# WSP4807

**Winsok Semicon** · MOSFETs · SOP-8

WSP4807 from Winsok Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of P-channel MOSFET 1; the datasheet gives VDSS of -30 V and VGSS of ±25 V for the device. |
| 2 | G1 | input | Gate terminal of P-channel MOSFET 1; gate-source voltage is rated ±25 V (VGSS). |
| 3 | S2 | passive | Source terminal of P-channel MOSFET 2; the datasheet gives VDSS of -30 V and VGSS of ±25 V for the device. |
| 4 | G2 | input | Gate terminal of P-channel MOSFET 2; gate-source voltage is rated ±25 V (VGSS). |
| 5 | D2 | passive | Drain terminal of P-channel MOSFET 2; drain-source voltage is rated -30 V (VDSS) and continuous drain current -8.9 A at TA=25°C. |
| 6 | D2 | passive | Drain terminal of P-channel MOSFET 2 (pins 5 and 6 are tied together internally); drain-source voltage is rated -30 V (VDSS) and continuous drain current -8.9 A at TA=25°C. |
| 7 | D1 | passive | Drain terminal of P-channel MOSFET 1 (pins 7 and 8 are tied together internally); drain-source voltage is rated -30 V (VDSS) and continuous drain current -8.9 A at TA=25°C. |
| 8 | D1 | passive | Drain terminal of P-channel MOSFET 1 (pins 7 and 8 are tied together internally); drain-source voltage is rated -30 V (VDSS) and continuous drain current -8.9 A at TA=25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -30 |  |  | V | VGS=0V, IDS=-250mA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | mA | VDS=-24V, VGS=0V | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -30 | mA | TJ=85°C | 2 |
| Gate Threshold Voltage | VGS(th) | -1 | -1.5 | -2.3 | V | VDS=VGS, IDS=-250mA | 2 |
| Gate Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±25V, VDS=0V | 2 |
| Drain-Source On-state Resistance | RDS(ON) |  | 15 | 21 | mW | VGS=-10V, IDS=-8.9A | 2 |
| Drain-Source On-state Resistance | RDS(ON) |  | 22 | 32 | mW | VGS=-4.5V, IDS=-5.6A | 2 |
| Diode Forward Voltage | VSD |  | -0.7 | -1 | V | ISD=-1A, VGS=0V | 2 |
| Drain-Source Voltage | VDSS | -30 |  |  | V |  | 1 |
| Gate-Source Voltage | VGSS | -25 |  | 25 | V |  | 1 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 1 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 1 |
| Diode Continuous Forward Current | IS | -1 |  |  | A | TA=25°C | 1 |
| Continuous Drain Current | ID | -8.9 |  |  | A | TA=25°C | 1 |
| Continuous Drain Current | ID | -7.1 |  |  | A | TA=70°C | 1 |
| Pulsed Drain Current | IDM | -35 |  |  | A | TA=25°C | 1 |
| Maximum Power Dissipation | PD |  |  | 2.5 | W | TA=25°C | 1 |
| Maximum Power Dissipation | PD |  |  | 1.6 | W | TA=70°C | 1 |
| Avalanche Current, Single pulse | IAS |  |  | 24 | A | Single pulse, L=0.1mH | 1 |
| Avalanche Current, Single pulse | IAS |  |  | 14 | A | Single pulse, L=0.5mH | 1 |
| Avalanche Energy, Single pulse | EAS |  |  | 29 | mJ | Single pulse, L=0.1mH | 1 |
| Avalanche Energy, Single pulse | EAS |  |  | 49 | mJ | Single pulse, L=0.5mH | 1 |
| Thermal Resistance Junction to Ambient | RθJA |  |  | 50 | °C/W | t ≤ 10s | 1 |
| Thermal Resistance Junction to Ambient | RθJA |  |  | 90 | °C/W | Steady state | 1 |
| Thermal Resistance Junction to Lead | RθJL |  |  | 20 | °C/W | Steady state | 1 |

## CAD (KiCad official)

- Symbol: `WSP4807`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `wsp4807-etched.step` / `wsp4807-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wsp4807.step` / `wsp4807.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Winsok Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586197482204237824) (7 pp, sha256 `c1ee62f8c378d586`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/wsp4807-datasheet.pdf)