component
WSP4620
Public Made by Adomby adom
Winsok Semicon MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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WSP4620
Winsok Semicon · MOSFETs · SOP-8
WSP4620 from Winsok Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1, per the SOP-8 pin configuration schematic. |
| 2 | G1 | input | Gate of MOSFET 1; VGS rated ±20 V maximum. |
| 3 | S2 | passive | Source of MOSFET 2, per the SOP-8 pin configuration schematic. |
| 4 | G2 | input | Gate of MOSFET 2; VGS rated ±20 V maximum. |
| 5 | D2 | passive | Drain of MOSFET 2, tied with pin 6 on the same drain node. |
| 6 | D2 | passive | Drain of MOSFET 2, tied with pin 5 on the same drain node. |
| 7 | D1 | passive | Drain of MOSFET 1, tied with pin 8 on the same drain node. |
| 8 | D1 | passive | Drain of MOSFET 1, tied with pin 7 on the same drain node. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage (N-Ch) | VDS | 30 | V | 1 | |||
| Drain-Source Voltage (P-Ch) | VDS | -30 | V | 1 | |||
| Gate-Source Voltage (N-Ch) | VGS | -20 | 20 | V | 1 | ||
| Gate-Source Voltage (P-Ch) | VGS | -20 | 20 | V | 1 | ||
| Continuous Drain Current (N-Ch) | ID@TC=25℃ | 8.8 | A | VGS @ 10V | 1 | ||
| Continuous Drain Current (P-Ch) | ID@TC=25℃ | -8.6 | A | VGS @ 10V | 1 | ||
| Continuous Drain Current at TC=100℃ (N-Ch) | ID@TC=100℃ | 6.8 | A | VGS @ 10V | 1 | ||
| Continuous Drain Current at TC=100℃ (P-Ch) | ID@TC=100℃ | -6.7 | A | VGS @ 10V | 1 | ||
| Pulsed Drain Current (N-Ch) | IDM | 17.5 | A | 1 | |||
| Pulsed Drain Current (P-Ch) | IDM | -17 | A | 1 | |||
| Single Pulse Avalanche Energy (N-Ch) | EAS | 72 | mJ | VDD=25V, VGS=10V, L=0.1mH, IAS=20A | 1 | ||
| Single Pulse Avalanche Energy (P-Ch) | EAS | 70 | mJ | VDD=-25V, VGS=-10V, L=0.1mH, IAS=-20A | 1 | ||
| Avalanche Current (N-Ch) | IAS | 26 | A | 1 | |||
| Avalanche Current (P-Ch) | IAS | -26.5 | A | 1 | |||
| Total Power Dissipation (N-Ch) | PD@TC=25℃ | 3.5 | W | 1 | |||
| Total Power Dissipation (P-Ch) | PD@TC=25℃ | 3.5 | W | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance Junction-Ambient | RθJA | 85 | ℃/W | Surface mounted on 1 inch2 FR-4 board, 2OZ copper, t<10sec (note 1) | 1 | ||
| Thermal Resistance Junction-Case | RθJC | 36 | ℃/W | Surface mounted on 1 inch2 FR-4 board, 2OZ copper, t<10sec (note 1) | 1 | ||
| Drain-Source Breakdown Voltage (N-Ch) | BVDSS | 30 | V | VGS=0V, ID=250uA | 2 | ||
| Static Drain-Source On-Resistance (N-Ch) | RDS(ON) | 18 | 24 | mΩ | VGS=10V, ID=8A | 2 | |
| Static Drain-Source On-Resistance (N-Ch) | RDS(ON) | 25 | 32 | mΩ | VGS=4.5V, ID=6A | 2 | |
| Gate Threshold Voltage (N-Ch) | VGS(th) | 1 | 1.5 | 2.5 | V | 2 | |
| Drain-Source Leakage Current at TJ=25℃ (N-Ch) | IDSS | 1 | uA | VDS=20V, VGS=0V, TJ=25℃ | 2 | ||
| Drain-Source Leakage Current at TJ=55℃ (N-Ch) | IDSS | 5 | uA | VDS=20V, VGS=0V, TJ=55℃ | 2 | ||
| Gate-Source Leakage Current (N-Ch) | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Gate Resistance (N-Ch) | Rg | 2.5 | 5 | Ω | VDS=0V, VGS=0V, f=1MHz | 2 | |
| Single Pulse Avalanche Energy (N-Ch) | EAS | 45 | mJ | VDD=25V, L=0.1mH, IAS=20A | 2 | ||
| Continuous Source Current (N-Ch) | IS | 9 | A | 2 | |||
| Pulsed Source Current (N-Ch) | ISM | 17.5 | A | VG=VD=0V, Force Current | 2 | ||
| Diode Forward Voltage (N-Ch) | VSD | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 2 | ||
| Drain-Source Breakdown Voltage (P-Ch) | BVDSS | -30 | V | VGS=0V, ID=-250uA | 3 | ||
| Static Drain-Source On-Resistance (P-Ch) | RDS(ON) | 22 | 32 | mΩ | VGS=-10V, ID=-6A | 3 | |
| Static Drain-Source On-Resistance (P-Ch) | RDS(ON) | 32 | 45 | mΩ | VGS=-4.5V, ID=-3A | 3 | |
| Gate Threshold Voltage (P-Ch) | VGS(th) | -1 | -1.6 | -2.5 | V | 3 | |
| Drain-Source Leakage Current at TJ=25℃ (P-Ch) | IDSS | 1 | uA | VDS=-20V, VGS=0V, TJ=25℃ | 3 | ||
| Drain-Source Leakage Current at TJ=55℃ (P-Ch) | IDSS | 5 | uA | VDS=-20V, VGS=0V, TJ=55℃ | 3 | ||
| Gate-Source Leakage Current (P-Ch) | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 3 | |
| Single Pulse Avalanche Energy (P-Ch) | EAS | 37 | mJ | VDD=-25V, L=0.1mH, IAS=-20A | 3 | ||
| Continuous Source Current (P-Ch) | IS | -8.6 | A | 3 | |||
| Pulsed Source Current (P-Ch) | ISM | -17 | A | VG=VD=0V, Force Current | 3 | ||
| Diode Forward Voltage (P-Ch) | VSD | -1.2 | V | VGS=0V, IS=-1A, TJ=25℃ | 3 |
CAD (KiCad official)
- Symbol:
WSP4620 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
wsp4620-etched.step/wsp4620-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);wsp4620.step/wsp4620.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Winsok Semicon datasheet (8 pp, sha256
16d63feddcd6c71b, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# WSP4620
**Winsok Semicon** · MOSFETs · SOP-8
WSP4620 from Winsok Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1, per the SOP-8 pin configuration schematic. |
| 2 | G1 | input | Gate of MOSFET 1; VGS rated ±20 V maximum. |
| 3 | S2 | passive | Source of MOSFET 2, per the SOP-8 pin configuration schematic. |
| 4 | G2 | input | Gate of MOSFET 2; VGS rated ±20 V maximum. |
| 5 | D2 | passive | Drain of MOSFET 2, tied with pin 6 on the same drain node. |
| 6 | D2 | passive | Drain of MOSFET 2, tied with pin 5 on the same drain node. |
| 7 | D1 | passive | Drain of MOSFET 1, tied with pin 8 on the same drain node. |
| 8 | D1 | passive | Drain of MOSFET 1, tied with pin 7 on the same drain node. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winsok Semicon |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage (N-Ch) | VDS | | | 30 | V | | 1 |
| Drain-Source Voltage (P-Ch) | VDS | | | -30 | V | | 1 |
| Gate-Source Voltage (N-Ch) | VGS | -20 | | 20 | V | | 1 |
| Gate-Source Voltage (P-Ch) | VGS | -20 | | 20 | V | | 1 |
| Continuous Drain Current (N-Ch) | ID@TC=25℃ | | | 8.8 | A | VGS @ 10V | 1 |
| Continuous Drain Current (P-Ch) | ID@TC=25℃ | | | -8.6 | A | VGS @ 10V | 1 |
| Continuous Drain Current at TC=100℃ (N-Ch) | ID@TC=100℃ | | | 6.8 | A | VGS @ 10V | 1 |
| Continuous Drain Current at TC=100℃ (P-Ch) | ID@TC=100℃ | | | -6.7 | A | VGS @ 10V | 1 |
| Pulsed Drain Current (N-Ch) | IDM | | | 17.5 | A | | 1 |
| Pulsed Drain Current (P-Ch) | IDM | | | -17 | A | | 1 |
| Single Pulse Avalanche Energy (N-Ch) | EAS | | | 72 | mJ | VDD=25V, VGS=10V, L=0.1mH, IAS=20A | 1 |
| Single Pulse Avalanche Energy (P-Ch) | EAS | | | 70 | mJ | VDD=-25V, VGS=-10V, L=0.1mH, IAS=-20A | 1 |
| Avalanche Current (N-Ch) | IAS | | | 26 | A | | 1 |
| Avalanche Current (P-Ch) | IAS | | | -26.5 | A | | 1 |
| Total Power Dissipation (N-Ch) | PD@TC=25℃ | | | 3.5 | W | | 1 |
| Total Power Dissipation (P-Ch) | PD@TC=25℃ | | | 3.5 | W | | 1 |
| Storage Temperature Range | TSTG | -55 | | 150 | ℃ | | 1 |
| Operating Junction Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance Junction-Ambient | RθJA | | | 85 | ℃/W | Surface mounted on 1 inch2 FR-4 board, 2OZ copper, t<10sec (note 1) | 1 |
| Thermal Resistance Junction-Case | RθJC | | | 36 | ℃/W | Surface mounted on 1 inch2 FR-4 board, 2OZ copper, t<10sec (note 1) | 1 |
| Drain-Source Breakdown Voltage (N-Ch) | BVDSS | 30 | | | V | VGS=0V, ID=250uA | 2 |
| Static Drain-Source On-Resistance (N-Ch) | RDS(ON) | | 18 | 24 | mΩ | VGS=10V, ID=8A | 2 |
| Static Drain-Source On-Resistance (N-Ch) | RDS(ON) | | 25 | 32 | mΩ | VGS=4.5V, ID=6A | 2 |
| Gate Threshold Voltage (N-Ch) | VGS(th) | 1 | 1.5 | 2.5 | V | | 2 |
| Drain-Source Leakage Current at TJ=25℃ (N-Ch) | IDSS | | | 1 | uA | VDS=20V, VGS=0V, TJ=25℃ | 2 |
| Drain-Source Leakage Current at TJ=55℃ (N-Ch) | IDSS | | | 5 | uA | VDS=20V, VGS=0V, TJ=55℃ | 2 |
| Gate-Source Leakage Current (N-Ch) | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 2 |
| Gate Resistance (N-Ch) | Rg | | 2.5 | 5 | Ω | VDS=0V, VGS=0V, f=1MHz | 2 |
| Single Pulse Avalanche Energy (N-Ch) | EAS | 45 | | | mJ | VDD=25V, L=0.1mH, IAS=20A | 2 |
| Continuous Source Current (N-Ch) | IS | | | 9 | A | | 2 |
| Pulsed Source Current (N-Ch) | ISM | | | 17.5 | A | VG=VD=0V, Force Current | 2 |
| Diode Forward Voltage (N-Ch) | VSD | | | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 2 |
| Drain-Source Breakdown Voltage (P-Ch) | BVDSS | -30 | | | V | VGS=0V, ID=-250uA | 3 |
| Static Drain-Source On-Resistance (P-Ch) | RDS(ON) | | 22 | 32 | mΩ | VGS=-10V, ID=-6A | 3 |
| Static Drain-Source On-Resistance (P-Ch) | RDS(ON) | | 32 | 45 | mΩ | VGS=-4.5V, ID=-3A | 3 |
| Gate Threshold Voltage (P-Ch) | VGS(th) | -1 | -1.6 | -2.5 | V | | 3 |
| Drain-Source Leakage Current at TJ=25℃ (P-Ch) | IDSS | | | 1 | uA | VDS=-20V, VGS=0V, TJ=25℃ | 3 |
| Drain-Source Leakage Current at TJ=55℃ (P-Ch) | IDSS | | | 5 | uA | VDS=-20V, VGS=0V, TJ=55℃ | 3 |
| Gate-Source Leakage Current (P-Ch) | IGSS | -100 | | 100 | nA | VGS=±20V, VDS=0V | 3 |
| Single Pulse Avalanche Energy (P-Ch) | EAS | 37 | | | mJ | VDD=-25V, L=0.1mH, IAS=-20A | 3 |
| Continuous Source Current (P-Ch) | IS | | | -8.6 | A | | 3 |
| Pulsed Source Current (P-Ch) | ISM | | | -17 | A | VG=VD=0V, Force Current | 3 |
| Diode Forward Voltage (P-Ch) | VSD | | | -1.2 | V | VGS=0V, IS=-1A, TJ=25℃ | 3 |
## CAD (KiCad official)
- Symbol: `WSP4620`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `wsp4620-etched.step` / `wsp4620-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wsp4620.step` / `wsp4620.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Winsok Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586176977594159104) (8 pp, sha256 `16d63feddcd6c71b`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/wsp4620-datasheet.pdf)