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WSF4012

Public Made by Adom

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Winsok Semicon MOSFETs, TO-252-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs wsf4012: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
viewers wsf4012: viewers · Ray 24d ago
package.json wsf4012: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
page.json wsf4012: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
README.md wsf4012: specified limits as data (metadata.characteristics, 60 rows from the datasheet) · Ray 19d ago
wsf4012-etched.glb wsf4012: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
wsf4012-etched.step wsf4012: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
wsf4012-hero.glb wsf4012: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
wsf4012-hero.overlay.json wsf4012: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain STEP) · Ray 17d ago
wsf4012.glb Publish 0.1.0 · Ray 24d ago
wsf4012.kicad_mod Publish 0.1.0 · Ray 24d ago
wsf4012.kicad_sym Publish 0.1.0 · Ray 24d ago
wsf4012.lbr Publish 0.1.0 · Ray 24d ago
wsf4012.step Publish 0.1.0 · Ray 24d ago

WSF4012

Winsok Semicon · MOSFETs · TO-252-4

WSF4012 from Winsok Semicon, in a TO-252-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (40V, 30A, RDSON 16mΩ at VGS=10V).
2 G1 input Gate of the N-channel MOSFET with VGS rated ±20V.
3 S2 passive Source of the P-channel MOSFET (-40V, -20A, RDSON 30mΩ at VGS=-10V).
4 G2 input Gate of the P-channel MOSFET with VGS rated ±20V.
5 D1/D2 passive Exposed tab, common drain of the N-channel and P-channel MOSFETs (D1 and D2 tied together).

Key specifications

Parameter Value
Manufacturer Winsok Semicon
Package TO-252-4
Category Transistors/Thyristors
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
N-ch Drain-Source Voltage VDS 40 V 1
P-ch Drain-Source Voltage VDS -40 V 1
N-ch Gate-Source Voltage VGS -20 20 V 1
P-ch Gate-Source Voltage VGS -20 20 V 1
N-ch Continuous Drain Current ID@TC=25℃ 30 A TC=25℃, VGS @ 10V 1
P-ch Continuous Drain Current ID@TC=25℃ -20 A TC=25℃, VGS @ 10V 1
N-ch Continuous Drain Current ID@TC=100℃ 20 A TC=100℃, VGS @ 10V 1
P-ch Continuous Drain Current ID@TC=100℃ -16 A TC=100℃, VGS @ 10V 1
N-ch Pulsed Drain Current IDM 46 A 1
P-ch Pulsed Drain Current IDM -40 A 1
N-ch Single Pulse Avalanche Energy EAS 28 mJ 1
P-ch Single Pulse Avalanche Energy EAS 66 mJ 1
N-ch Avalanche Current IAS 17.8 A 1
P-ch Avalanche Current IAS -27.2 A 1
N-ch Total Power Dissipation PD@TC=25℃ 25 W TC=25℃ 1
P-ch Total Power Dissipation PD@TC=25℃ 31.3 W TC=25℃ 1
N-ch Storage Temperature Range TSTG -55 150 ℃ 1
P-ch Storage Temperature Range TSTG -55 150 ℃ 1
N-ch Operating Junction Temperature Range TJ -55 150 ℃ 1
P-ch Operating Junction Temperature Range TJ -55 150 ℃ 1
Thermal Resistance Junction-Ambient RθJA 62 ℃/W 1 inch2 FR-4 board, 2OZ copper (note 1) 1
Thermal Resistance Junction-Case RθJC 5 ℃/W 1 inch2 FR-4 board, 2OZ copper (note 1) 1
N-ch Drain-Source Breakdown Voltage BVDSS 40 V VGS=0V, ID=250uA 2
N-ch Static Drain-Source On-Resistance RDS(ON) 16 21 mΩ VGS=10V, ID=12A 2
N-ch Static Drain-Source On-Resistance RDS(ON) 18 25 mΩ VGS=4.5V, ID=10A 2
N-ch Gate Threshold Voltage VGS(th) 1.5 2 2.5 V 2
N-ch Drain-Source Leakage Current (TJ=25℃) IDSS 1 uA VDS=32V, VGS=0V, TJ=25℃ 2
N-ch Drain-Source Leakage Current (TJ=55℃) IDSS 5 uA VDS=32V, VGS=0V, TJ=55℃ 2
N-ch Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 2
N-ch Gate Resistance Rg 2.6 5.2 Ω VDS=0V, VGS=0V, f=1MHz 2
N-ch Single Pulse Avalanche Energy EAS 9 mJ VDD=25V, L=0.1mH, IAS=10A 2
N-ch Continuous Source Current IS 23 A 2
N-ch Pulsed Source Current ISM 46 A VG=VD=0V, Force Current 2
N-ch Diode Forward Voltage VSD 1.2 V VGS=0V, IS=1A, TJ=25℃ 2
P-ch Drain-Source Breakdown Voltage BVDSS -40 V VGS=0V, ID=-250uA 3
P-ch Static Drain-Source On-Resistance RDS(ON) 30 38 mΩ VGS=-10V, ID=-8A 3
P-ch Static Drain-Source On-Resistance RDS(ON) 46 62 mΩ VGS=-4.5V, ID=-4A 3
P-ch Gate Threshold Voltage VGS(th) -1.5 -2 -2.5 V 3
P-ch Drain-Source Leakage Current (TJ=25℃) IDSS 1 uA VDS=-32V, VGS=0V, TJ=25℃ 3
P-ch Drain-Source Leakage Current (TJ=55℃) IDSS 5 uA VDS=-32V, VGS=0V, TJ=55℃ 3
P-ch Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V, VDS=0V 3
P-ch Gate Resistance Rg 13 16 Ω VDS=0V, VGS=0V, f=1MHz 3
P-ch Single Pulse Avalanche Energy EAS 20 mJ VDD=-25V, L=0.1mH, IAS=-15A 3
P-ch Continuous Source Current IS -20 A 3
P-ch Pulsed Source Current ISM -40 A VG=VD=0V, Force Current 3
P-ch Diode Forward Voltage VSD -1 V VGS=0V, IS=-1A, TJ=25℃ 3
N-ch Breakdown Voltage Temperature Coefficient ΔBVDSS/ΔTJ 0.034 V/℃ Reference to 25℃, ID=1mA 2
N-ch Gate Threshold Voltage Temperature Coefficient ΔVGS(th) -4.56 mV/℃ VGS=VDS, ID=250uA 2
N-ch Forward Transconductance gfs 8 S VDS=5V, ID=12A 2
N-ch Total Gate Charge (4.5V) Qg 5.5 nC VDS=20V, VGS=4.5V, ID=12A 2
N-ch Input Capacitance Ciss 593 pF VDS=15V, VGS=0V, f=1MHz 2
N-ch Output Capacitance Coss 76 pF VDS=15V, VGS=0V, f=1MHz 2
N-ch Reverse Transfer Capacitance Crss 56 pF VDS=15V, VGS=0V, f=1MHz 2
P-ch Breakdown Voltage Temperature Coefficient ΔBVDSS/ΔTJ -0.012 V/℃ Reference to 25℃, ID=-1mA 3
P-ch Gate Threshold Voltage Temperature Coefficient ΔVGS(th) 4.32 mV/℃ VGS=VDS, ID=-250uA 3
P-ch Forward Transconductance gfs 12.6 S VDS=-5V, ID=-8A 3
P-ch Total Gate Charge (-4.5V) Qg 9 nC VDS=-20V, VGS=-4.5V, ID=-12A 3
P-ch Input Capacitance Ciss 1004 pF VDS=-15V, VGS=0V, f=1MHz 3
P-ch Output Capacitance Coss 108 pF VDS=-15V, VGS=0V, f=1MHz 3
P-ch Reverse Transfer Capacitance Crss 80 pF VDS=-15V, VGS=0V, f=1MHz 3

CAD (KiCad official)

  • Symbol: WSF4012
  • Footprint: Package_TO_SOT_SMD:TO-252-4
  • 3D model: TO-252-4 (KiCad packages3D, STEP)
  • 3D model files: wsf4012-etched.step / wsf4012-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); wsf4012.step / wsf4012.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winsok Semicon datasheet (7 pp, sha256 cd65df5d30142a21, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF