main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 18d ago
viewers wsd4078dn56: viewers · Ray 18d ago
package.json Publish 0.1.0 · Ray 18d ago
page.json Set visibility: public · Ray 18d ago
README.md Publish 0.1.0 · Ray 18d ago
wsd4078dn56-etched.glb Publish 0.1.0 · Ray 18d ago
wsd4078dn56-etched.step wsd4078dn56: factory component page (tier=lcsc) · Ray 18d ago
wsd4078dn56-hero.glb wsd4078dn56: hero GLB from the etched model (keeps the MPN mark) · Ray 18d ago
wsd4078dn56-hero.overlay.json Publish 0.1.0 · Ray 18d ago
wsd4078dn56.glb Publish 0.1.0 · Ray 18d ago
wsd4078dn56.kicad_mod Publish 0.1.0 · Ray 18d ago
wsd4078dn56.kicad_sym Publish 0.1.0 · Ray 18d ago
wsd4078dn56.lbr Publish 0.1.0 · Ray 18d ago
wsd4078dn56.step Publish 0.1.0 · Ray 18d ago

WSD4078DN56

Winsok Semicon · MOSFETs · DFN-8(5x6)

WSD4078DN56 from Winsok Semicon, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel, VDS 40 V, ID 40 A).
2 G1 input Gate of MOSFET 1 (VGS ±20 V max, threshold 1.2 to 2.5 V).
3 S2 passive Source of MOSFET 2 (N-channel, VDS 40 V, ID 40 A).
4 G2 input Gate of MOSFET 2 (VGS ±20 V max, threshold 1.2 to 2.5 V).
5 D2 passive Drain of MOSFET 2 (VDS 40 V, RDS(ON) 7.0 mΩ typ at VGS=10 V).
6 D2 passive Drain of MOSFET 2, tied to the other D2 pin (VDS 40 V).
7 D1 passive Drain of MOSFET 1 (VDS 40 V, RDS(ON) 7.0 mΩ typ at VGS=10 V).
8 D1 passive Drain of MOSFET 1, tied to the other D1 pin (VDS 40 V).
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Winsok Semicon
Package DFN-8(5x6)
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 40 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID@TC=25℃ 40 A VGS @ 10V 1
Continuous Drain Current ID@TC=100℃ 28 A VGS @ 10V 1
Pulsed Drain Current IDM 180 A 1
Single Pulse Avalanche Energy EAS 10 mJ 1
Avalanche Current IAS 14 A 1
Total Power Dissipation PD@Tc=25℃ 31 W 1
Storage Temperature Range TSTG -55 150 ℃ 1
Operating Junction Temperature Range TJ -55 150 ℃ 1
Thermal Resistance Junction-Ambient RθJA 55 ℃/W 1
Thermal Resistance Junction-Case RθJC 4.1 ℃/W 1
Drain-Source Breakdown Voltage BVDSS 40 V VGS=0V , ID=250uA 2
Static Drain-Source On-Resistance RDS(ON) 7 9.5 mΩ 2
Static Drain-Source On-Resistance RDS(ON) 11 15 mΩ VGS=4.5V , ID=15A 2
Gate Threshold Voltage VGS(th) 1.2 1.6 2.5 V VGS=VDS , ID =250uA 2
Drain-Source Leakage Current IDSS 2 uA VDS=32V , VGS=0V , TJ=25℃ 2
Drain-Source Leakage Current IDSS 10 uA VDS=32V , VGS=0V , TJ=55℃ 2
Gate-Source Leakage Current IGSS -100 100 nA VGS=±20V , VDS=0V 2
Continuous Source Current IS 25 A VG=VD=0V , Force Current 2
Diode Forward Voltage VSD 1.2 V VGS=0V , IS=1A , TJ=25℃ 2
BVDSS Temperature Coefficient △BVDSS/△TJ 0.043 V/℃ Reference to 25℃ , ID=1mA 2
VGS(th) Temperature Coefficient △VGS(th) -6.94 mV/℃ VGS=VDS , ID =250uA 2
Forward Transconductance gfs 13 S VDS=5V , ID=15A 2
Gate Resistance Rg 0.8 Ω VDS=0V , VGS=0V , f=1MHz 2
Total Gate Charge (10V) Qg 9.4 nC VDS=20V , VGS=10V , ID=20A 2
Gate-Source Charge Qgs 1.9 nC VDS=20V , VGS=10V , ID=20A 2
Gate-Drain Charge Qgd 6 nC VDS=20V , VGS=10V , ID=20A 2
Turn-On Delay Time Td(on) 12 ns VDD=20V , VGEN=10V , RG=1Ω, ID=1A ,RL=15Ω 2
Rise Time Tr 10 ns VDD=20V , VGEN=10V , RG=1Ω, ID=1A ,RL=15Ω 2
Turn-Off Delay Time Td(off) 25 ns VDD=20V , VGEN=10V , RG=1Ω, ID=1A ,RL=15Ω 2
Fall Time Tf 11 ns VDD=20V , VGEN=10V , RG=1Ω, ID=1A ,RL=15Ω 2
Input Capacitance Ciss 700 pF VDS=20V , VGS=0V , f=1MHz 2
Output Capacitance Coss 132 pF VDS=20V , VGS=0V , f=1MHz 2
Reverse Transfer Capacitance Crss 108 pF VDS=20V , VGS=0V , f=1MHz 2

CAD (KiCad official)

  • Symbol: WSD4078DN56
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
  • 3D model files: wsd4078dn56-etched.step / wsd4078dn56-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); wsd4078dn56.step / wsd4078dn56.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winsok Semicon datasheet (7 pp, sha256 6504a56faf506e8e, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF