component
WS4612EDA-5
Public Made by Adomby adom
WILLSEMI Will Semicon Power Distribution Switches, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownWS4612EDA-5
WILLSEMI Will Semicon · Power Distribution Switches · SOT-23-5L
WS4612EDA-5 from WILLSEMI Will Semicon, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Output pin of the power switch; the datasheet gives an absolute maximum voltage range of -0.3 to 6.5 V for this pin. |
| 2 | GND | power_in | Ground pin, the device reference ground that the input and output capacitor negatives must return to. |
| 3 | FLG | output | Fault flag pin, open-drain and active low, asserted after a 7.5 ms (Typ.) delay during over-current or over-temperature; the FLG pin voltage range is -0.3 to 6.5 V. |
| 4 | EN | input | Enable pin must be driven to a clearly defined logic high or low (VIL max 0.4 V, VIH min 1.2 V at VIN=5 V), since floating it may cause unpredictable operation; the EN pin voltage range is -0.3 to 6.5 V. |
| 5 | IN | power_in | Input pin supplying the switch, with a supply input voltage range of 2.5 to 5.5 V and an absolute maximum IN pin voltage of -0.3 to 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WILLSEMI Will Semicon |
| Package | SOT-23-5L |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Current limit (WS4612ED, 2.4A option) | ILIM | 2.1 | 2.4 | 2.7 | A | Pulse test, Period=10mS, Duty cycle=4% | 6 |
| Quiescent supply current | IQ | 26 | 50 | μA | IOUT=0, VIN=5V, VEN=enable | 6 | |
| Shutdown current | ISD | 1 | μA | VEN=disable | 6 | ||
| Reverse current | IREV | 1 | μA | VIN=0V, VEN=disable, VOUT=5V, Current flow to VIN | 6 | ||
| Main-FET ON resistance | RON | 60 | 70 | mΩ | VIN=5V, VEN=enable, IOUT=500mA | 6 | |
| Auto-discharge FET ON resistance | RDCHG | 50 | 100 | Ω | VIN =5V, VEN=disable, VOUT=2V | 6 | |
| Short circuit current limiting response time | tSHORT | 1 | μs | OUT connected to GND, CL=1μF | 6 | ||
| EN input low voltage | VIL | 0.4 | V | VIN=5V | 6 | ||
| EN input high voltage | VIH | 1.2 | V | VIN=5V | 6 | ||
| OUT pin turn-on time after EN ON | tON | 600 | μs | VIN=5V CL=1μF RL=5ohm | 6 | ||
| Fault flag output blanking time | tBLANK | 7.5 | ms | VIN=5.0V | 6 | ||
| Over-temperature shutdown threshold | TSD | 160 | °C | 6 | |||
| Over-temperature threshold hysteresis | THYS | 20 | °C | 6 | |||
| Under voltage lock out threshold | VUVLO | 2.25 | 2.4 | V | 6 | ||
| Under voltage lock out hysteresis | VUVLO-HYS | 250 | mV | 6 | |||
| IN pin voltage range | VIN | -0.3 | 6.5 | V | 4 | ||
| OUT pin voltage range | VOUT | -0.3 | 6.5 | V | 4 | ||
| ISET pin voltage range | VISET | -0.3 | 6.5 | V | 4 | ||
| FLG pin voltage range | VFLG | -0.3 | 6.5 | V | 4 | ||
| EN pin voltage range | VEN | -0.3 | 6.5 | V | 4 | ||
| Junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Lead temperature (soldering) | TL | 260 | °C | Soldering, 10s | 4 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 4 | ||
| ESD HBM | HBM | 2000 | V | 4 | |||
| ESD CDM | CDM | 2000 | V | 4 | |||
| Supply input voltage range | VIN | 2.5 | 5.5 | V | 4 | ||
| Operating ambient temperature | TA | -40 | 85 | °C | 4 | ||
| Thermal resistance, junction to ambient | RθJA | 250 | °C/W | Surface mounted on FR-4 board, 2 oz, 11 square inch Cu area; PCB 1.51.5 square inches | 4 | ||
| Thermal resistance, junction to case | RθJC | 58 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
WS4612EDA-5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files:
ws4612eda-5-etched.step/ws4612eda-5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ws4612eda-5.step/ws4612eda-5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WILLSEMI Will Semicon datasheet (16 pp, sha256
da79c5b4ae3031b9, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).