component
WS3235D-8
Public Made by Adomby adom
WILLSEMI(Will Semicon) Voltage References, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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WS3235D-8
WILLSEMI(Will Semicon) · Voltage References · DFN-8-EP(2x2)
WS3235D-8 from WILLSEMI(Will Semicon), in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | The input power source; VIN can withstand up to 30V input. |
| 2 | GND | power_in | Analog ground. |
| 3 | NC | unconnected | No internal connection. |
| 4 | WRN | output | Open-drain logic output that turns LOW when any protection event occurs. |
| 5 | EN | input | Active-low chip enable; pull low or leave floating to enable the IC and force high to disable it. |
| 6 | VB | power_in | Battery voltage monitoring input connected to the battery pack positive terminal via an isolation resistor; recommended RVB is 10kΩ to 200kΩ. |
| 7 | ILIM | passive | Over current protection threshold setting pin; connect a resistor between this pin and GND to set the OCP threshold. |
| 8 | VOUT | power_out | Output through the power MOSFET. |
| 9 | GND | power_in | The exposed pad must be soldered to a large PCB and connected to GND for maximum thermal dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WILLSEMI(Will Semicon) |
| Package | DFN-8-EP(2x2) |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operation Voltage Range | VIN | 3 | 6.55 | V | WS3235D | 4 | |
| Input OVP Threshold Voltage | VIN_OVP | 6.65 | 6.8 | 6.95 | V | WS3235D | 4 |
| Input OVP Hysteresis | 100 | 120 | mV | 4 | |||
| Supply Voltage POR Threshold | VPOR | 2.5 | 2.7 | 2.9 | V | VPOR Rising | 4 |
| Under Voltage Lockout Threshold | VUVLO | 2.45 | 2.75 | V | VUVLO Falling | 4 | |
| Input Quiescent Current | IQ | 330 | 400 | μA | EN = 0V | 4 | |
| Input Shutdown Current | ISHDN | 55 | 70 | μA | EN = 5V | 4 | |
| Over Current Protection | IOCP | 0.91 | 1 | 1.09 | A | RILIM = 25k | 4 |
| Battery Over Voltage Protection | VBOVP | 4.3 | 4.35 | 4.4 | V | Rising | 4 |
| Logic-Low Threshold Voltage | VIL | 0.4 | V | EN | 5 | ||
| Logic-High Threshold Voltage | VIH | 1.5 | V | EN | 5 | ||
| EN Internal Pull Down Resistor | 170 | 220 | 270 | kΩ | 5 | ||
| WRN Output Logic Low | 0.19 | 0.3 | V | Sink 1mA | 5 | ||
| On Resistance | RON | 200 | 300 | mΩ | IOUT = 500mA, 4.3V < VIN < 6.5V | 5 | |
| Battery OVP Falling Threshold | 4.25 | V | 4 | ||||
| Battery OVP Hysteresis | 30 | mV | 4 | ||||
| Deglitch Time of POR | 8 | ms | 4 | ||||
| Input OVP Propagation Delay | 0.1 | μs | VIN rising at 10V/μs | 4 | |||
| Input OVP Recovery Delay | 8 | ms | 4 | ||||
| Over Current Protection Blanking Time | TOC | 180 | μs | 4 | |||
| Over Current Recover Delay | 64 | ms | 4 | ||||
| Battery OVP Blanking Time | TVBOV | 180 | μs | 4 | |||
| Battery OVP Recover Delay | 8 | ms | 4 | ||||
| VB Pin Leakage Current | 85 | nA | VVB = 4.4V | 4 | |||
| Over Temperature Protection Threshold | TSD | 155 | °C | Rising | 4 | ||
| OTP Hysteresis | 30 | °C | 4 | ||||
| OTP Recover Delay | 8 | ms | 4 | ||||
| Soft-Start Time | 8 | ms | 5 | ||||
| WRN Output Logic High Leakage Current | 0.1 | μA | 5 | ||||
| Thermal Resistance Junction to Ambient | RθJA | 90 | °C/W | DFN2x2-8L, Note 1 (1.5x1.5 in 2-layer FR4 board, still air) | 3 | ||
| Thermal Resistance Junction to Case | RθJC | 15 | °C/W | DFN2x2-8L | 3 | ||
| VIN pin voltage range | VIN | -0.3 | 30 | V | 3 | ||
| VOUT pin voltage range | VOUT | -0.3 | 15 | V | 3 | ||
| VB pin voltage range | VB | -0.3 | 15 | V | 3 | ||
| Other pins voltage range | -0.3 | 6 | V | 3 | |||
| Junction temperature | TJ | 150 | °C | 3 | |||
| Lead temperature (Soldering, 10sec.) | TL | 260 | °C | 10 sec | 3 | ||
| Operation temperature | Topr | -40 | 85 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| ESD HBM | 4000 | V | HBM | 3 | |||
| ESD CDM | 2000 | V | CDM | 3 | |||
| ESD MM | 200 | V | MM | 3 |
CAD (KiCad official)
- Symbol:
WS3235D-8 - Footprint:
Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm - 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
ws3235d-8-etched.step/ws3235d-8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ws3235d-8.step/ws3235d-8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WILLSEMI(Will Semicon) datasheet (12 pp, sha256
a939bee1deb836cc, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# WS3235D-8
**WILLSEMI(Will Semicon)** · Voltage References · DFN-8-EP(2x2)
WS3235D-8 from WILLSEMI(Will Semicon), in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | The input power source; VIN can withstand up to 30V input. |
| 2 | GND | power_in | Analog ground. |
| 3 | NC | unconnected | No internal connection. |
| 4 | WRN | output | Open-drain logic output that turns LOW when any protection event occurs. |
| 5 | EN | input | Active-low chip enable; pull low or leave floating to enable the IC and force high to disable it. |
| 6 | VB | power_in | Battery voltage monitoring input connected to the battery pack positive terminal via an isolation resistor; recommended RVB is 10kΩ to 200kΩ. |
| 7 | ILIM | passive | Over current protection threshold setting pin; connect a resistor between this pin and GND to set the OCP threshold. |
| 8 | VOUT | power_out | Output through the power MOSFET. |
| 9 | GND | power_in | The exposed pad must be soldered to a large PCB and connected to GND for maximum thermal dissipation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WILLSEMI(Will Semicon) |
| Package | DFN-8-EP(2x2) |
| Category | Power Management ICs |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operation Voltage Range | VIN | 3 | | 6.55 | V | WS3235D | 4 |
| Input OVP Threshold Voltage | VIN_OVP | 6.65 | 6.8 | 6.95 | V | WS3235D | 4 |
| Input OVP Hysteresis | | | 100 | 120 | mV | | 4 |
| Supply Voltage POR Threshold | VPOR | 2.5 | 2.7 | 2.9 | V | VPOR Rising | 4 |
| Under Voltage Lockout Threshold | VUVLO | | 2.45 | 2.75 | V | VUVLO Falling | 4 |
| Input Quiescent Current | IQ | | 330 | 400 | μA | EN = 0V | 4 |
| Input Shutdown Current | ISHDN | | 55 | 70 | μA | EN = 5V | 4 |
| Over Current Protection | IOCP | 0.91 | 1 | 1.09 | A | RILIM = 25k | 4 |
| Battery Over Voltage Protection | VBOVP | 4.3 | 4.35 | 4.4 | V | Rising | 4 |
| Logic-Low Threshold Voltage | VIL | | | 0.4 | V | EN | 5 |
| Logic-High Threshold Voltage | VIH | | 1.5 | | V | EN | 5 |
| EN Internal Pull Down Resistor | | 170 | 220 | 270 | kΩ | | 5 |
| WRN Output Logic Low | | | 0.19 | 0.3 | V | Sink 1mA | 5 |
| On Resistance | RON | | 200 | 300 | mΩ | IOUT = 500mA, 4.3V < VIN < 6.5V | 5 |
| Battery OVP Falling Threshold | | | 4.25 | | V | | 4 |
| Battery OVP Hysteresis | | | 30 | | mV | | 4 |
| Deglitch Time of POR | | | 8 | | ms | | 4 |
| Input OVP Propagation Delay | | | 0.1 | | μs | VIN rising at 10V/μs | 4 |
| Input OVP Recovery Delay | | | 8 | | ms | | 4 |
| Over Current Protection Blanking Time | TOC | | 180 | | μs | | 4 |
| Over Current Recover Delay | | | 64 | | ms | | 4 |
| Battery OVP Blanking Time | TVBOV | | 180 | | μs | | 4 |
| Battery OVP Recover Delay | | | 8 | | ms | | 4 |
| VB Pin Leakage Current | | | 85 | | nA | VVB = 4.4V | 4 |
| Over Temperature Protection Threshold | TSD | | 155 | | °C | Rising | 4 |
| OTP Hysteresis | | | 30 | | °C | | 4 |
| OTP Recover Delay | | | 8 | | ms | | 4 |
| Soft-Start Time | | | 8 | | ms | | 5 |
| WRN Output Logic High Leakage Current | | | 0.1 | | μA | | 5 |
| Thermal Resistance Junction to Ambient | RθJA | | 90 | | °C/W | DFN2x2-8L, Note 1 (1.5x1.5 in 2-layer FR4 board, still air) | 3 |
| Thermal Resistance Junction to Case | RθJC | | 15 | | °C/W | DFN2x2-8L | 3 |
| VIN pin voltage range | VIN | -0.3 | | 30 | V | | 3 |
| VOUT pin voltage range | VOUT | -0.3 | | 15 | V | | 3 |
| VB pin voltage range | VB | -0.3 | | 15 | V | | 3 |
| Other pins voltage range | | -0.3 | | 6 | V | | 3 |
| Junction temperature | TJ | | | 150 | °C | | 3 |
| Lead temperature (Soldering, 10sec.) | TL | | | 260 | °C | 10 sec | 3 |
| Operation temperature | Topr | -40 | | 85 | °C | | 3 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| ESD HBM | | | | 4000 | V | HBM | 3 |
| ESD CDM | | | | 2000 | V | CDM | 3 |
| ESD MM | | | | 200 | V | MM | 3 |
## CAD (KiCad official)
- Symbol: `WS3235D-8`
- Footprint: `Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm`
- 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `ws3235d-8-etched.step` / `ws3235d-8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ws3235d-8.step` / `ws3235d-8.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [WILLSEMI(Will Semicon) datasheet](docs/ws3235d-8-datasheet.pdf) (12 pp, sha256 `a939bee1deb836cc`, retrieved 2026-10-28, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ws3235d-8-datasheet.pdf)