component

WS3088EESA-GEC

Public Made by Adom

by adom

GEC RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfacews3088eesa-gecfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers ws3088eesa-gec: viewers · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago
ws3088eesa-gec-etched.glb Publish 0.1.0 · Ray 17d ago
ws3088eesa-gec-etched.step ws3088eesa-gec: factory component page (healed after the 2026-10-18 wiki outage) · Ray 17d ago
ws3088eesa-gec-hero.glb ws3088eesa-gec: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
ws3088eesa-gec-hero.overlay.json Publish 0.1.0 · Ray 17d ago
ws3088eesa-gec.glb Publish 0.1.0 · Ray 17d ago
ws3088eesa-gec.kicad_mod Publish 0.1.0 · Ray 17d ago
ws3088eesa-gec.kicad_sym Publish 0.1.0 · Ray 17d ago
ws3088eesa-gec.lbr Publish 0.1.0 · Ray 17d ago
ws3088eesa-gec.step Publish 0.1.0 · Ray 17d ago

WS3088EESA-GEC

GEC · RS-485 / RS-422 ICs · SOP-8

WS3088EESA-GEC from GEC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output: when the receiver is enabled, RO goes high if V(A)-V(B) > -50mV and low if V(A)-V(B) < -200mV.
2 RE input Receiver output enable, active low: RO is valid when RE is low, and the receiver is disabled when RE is high; RE high with DE low puts the whole chip in shutdown.
3 DE input Driver output enable: high enables the driver, low disables it and places the driver output in high impedance; RE high with DE low puts the whole chip in shutdown.
4 DI input Driver input: low forces the non-inverting output low and the inverting output high, high forces the non-inverting output high and the inverting output low.
5 GND power_in Ground.
6 A bidirectional Bus interface: non-inverting driver output and non-inverting receiver input.
7 B bidirectional Bus interface: inverting driver output and inverting receiver input.
8 Vcc power_in Positive supply, recommended 4.75 V to 5.25 V (5 V nominal); bypass VCC to GND with a 0.1µF capacitor.

Key specifications

Parameter Value
Manufacturer GEC
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Driver differential output (no load) VOD1 5 V 图 1 2
Driver differential output (RS-422 load) VOD2 2 V 图 1,R=50Ω(RS-422) 2
Driver differential output (RS-485 load) VOD2 1.5 V 图 1,R=27Ω(RS-485) 2
Differential output amplitude change ΔVOD 0.2 V 图 1,R=50ΩorR=27Ω 2
Driver output common-mode voltage VOC 1 3 V 图 1,R=50ΩorR=27Ω 2
Driver output common-mode voltage change ΔVOC 0.2 V 图 1,R=50ΩorR=27Ω 2
Input high voltage VIH1 2 V DE, DI, RE 2
Input low voltage VIL1 0.8 V DE, DI, RE 2
Input hysteresis VHYS 100 mV DE, DI, RE 2
Input current IIN1 -2 2 µA DE, DI, RE (注 2) 2
Input current (A and B) IIN4 125 µA DE = GND, VCC=GND or 5.25V, VIN=12V 2
Input current (A and B) IIN4 -75 µA DE = GND, VCC=GND or 5.25V, VIN=-7V 2
Driver output short-circuit current IOD1 -100 mA -7V≤VOUT≤VCC 2
Driver output short-circuit current IOD1 100 mA 0V≤VOUT≤12V 2
Driver output short-circuit current IOD1 -25 25 mA 0V≤VOUT≤VCC 2
Receiver differential input threshold voltage VTH -200 -50 mV -7V≤VCM≤+12V 2
Receiver differential input threshold hysteresis ΔVTH 40 mV 2
Receiver output high voltage VOH 4 V IO=-4mA,VID=1V 2
Receiver output low voltage VOL 0.4 V IO=4mA,VID=-1V 2
Receiver output high-impedance leakage current IOZR -1 1 µA 0.4V≤VO≤2.4V 2
Receiver input impedance RIN 96 kΩ -7V≤VCM≤+12V 2
Receiver output short-circuit current IOSR -7 95 mA 0V≤VRO≤VCC 3
Quiescent supply current (DE = VCC) ICC 370 600 µA No load, RE, DI, GND or Vcc; DE=VCC 3
Quiescent supply current (DE = GND) ICC 370 600 µA No load, RE, DI, GND or Vcc; DE=GND 3
Shutdown current ISHDN 1.8 10 µA DE GND, RE Vcc 3
ESD contact discharge (pins A, B), IEC 61000-4-2 -12 12 kV IEC 61000-4-2 contact discharge 3
ESD human body model (pins A, B) -15 15 kV Human body model 3
ESD human body model (other pins) -4 4 kV Human body model 3
Driver propagation delay (low to high) tDPLH 20 50 ns 图 3 和 5, RDIFF=54 欧姆，CL=54pF 4
Driver propagation delay (high to low) tDPHL 20 50 ns 图 3 和 5, RDIFF=54 欧姆，CL=54pF 4
Driver differential propagation delay skew tDSKEW -100 -3 100 ns 图 3 和 5,RDIFF=54 欧姆，CL1=CL2=100pF 4
Driver rise time tDR 30 100 ns 图 3 和 5, RDIFF=54 欧姆，CL1=CL2=100pF 4
Driver fall time tDF 30 100 ns 图 3 和 5, RDIFF=54 欧姆，CL1=CL2=100pF 4
Maximum data rate fMAX 10000 kbps 4
Driver enable to output high tDZH 30 80 ns 图 4 和 6,CL=100pF,S2 关断 4
Driver enable to output low tDZL 30 80 ns 图 4 和 6,CL=100pF,S1 关断 4
Driver output low to disable time tDLZ 30 80 ns 图 4 和 6, CL=15pF,S1 关断 4
Driver output high to disable time tDHZ 30 80 ns 图 4 和 6, CL=15pF,S2 关断 4
Receiver propagation delay (low to high) tRPLH 120 200 ns 图7和9；/VID/≥2.0V；VID上升下降时间小于15纳秒 4
Receiver differential propagation delay skew tRSKD -50 10 50 ns 图7和9；/VID/≥2.0V；VID上升下降时间小于15纳秒 5
Receiver enable to output low tRZL 20 80 ns 图 2 和 8, CL= 100pF,S1 关断 5
Receiver enable to output high tRZH 20 80 ns 图 2 和 8, CL=100pF,S2 关断 5
Receiver output high to disable time tRHZ 20 80 ns 图 2 和 8, CL=100pF,S1 关断 5
Receiver output low to disable time tRLZ 20 80 ns 图 2 和 8, CL=100pF,S2 关断 5
Chip shutdown time tSHDN 50 200 600 ns 注 3 5
Driver enable to output high from chip shutdown tDZH(SHDN) 4500 ns 图 4 和 6,CL=15pF,S2 关断 5
Driver enable to output low from chip shutdown tDZL(SHDN) 4500 ns 图 4 和 6,CL=15pF,S1 关断 5
Receiver enable to output high from chip shutdown tRZH(SHDN) 3500 ns 图 2 和 8,CL=100pF,S2 关断 5
Receiver enable to output low from chip shutdown tRZL(SHDN) 3500 ns 图 2 和 8,CL=100pF,S1 关断 5
Supply voltage (maximum) VCC 7 V 8
Logic pin voltage (DE, RE, DI, RO) -0.3 7 V 8
Bus pin voltage (A, B) -8 13 V 8
Storage temperature TSTG -65 150 ℃ 8
Maximum junction temperature TJ 150 ℃ 8
ESD HBM rating ESD-HBM 2000 V 8
Recommended supply voltage VDD 4.75 5 5.25 V 8
Operating temperature TA -40 125 ℃ 8

CAD (KiCad official)

  • Symbol: WS3088EESA-GEC
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ws3088eesa-gec-etched.step / ws3088eesa-gec-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ws3088eesa-gec.step / ws3088eesa-gec.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GEC datasheet (11 pp, sha256 85663315d10ede1d, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF