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WS3079

Public Made by Adom

by adom

GEC RS-485 / RS-422 ICs, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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WS3079

GEC · RS-485 / RS-422 ICs · SOP-14

WS3079 from GEC, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 H/F input Half/full-duplex select: tie H/F to VCC for half-duplex mode; tie to GND or leave open for full-duplex mode.
2 RO output Receiver output: with the receiver enabled, RO goes high when V(A)-V(B) > -50 mV and low when V(A)-V(B) < -200 mV, and the datasheet states it is high for open or shorted inputs.
3 RE input Receiver output enable, active low: RE low enables RO, and RE high disables the receiver; RE high with DE low puts the whole chip into shutdown.
4 DE input Driver output enable: DE high enables the driver, and DE low disables it and puts the driver outputs in high-impedance.
5 DI input Driver input: DI low forces the non-inverting output low and the inverting output high, and DI high forces the non-inverting output high and the inverting output low.
6 SRL input Slew-rate limit select: tie to GND for 16 Mbps, tie to VCC for 500 Kbps, and leave floating for 250 Kbps.
7 GND power_in Ground reference for the device.
8 TXP input Driver phase control: tie to GND or leave open for normal driver output polarity, and tie to VCC to reverse the driver output phase.
9 Y bidirectional Driver non-inverting output, which is also the receiver non-inverting input in half-duplex mode.
10 Z bidirectional Driver inverting output, which is also the receiver inverting input in half-duplex mode.
11 B input Receiver inverting input presenting a 1/8 unit load; in full-duplex mode it is not connected to the receiver.
12 A input Receiver non-inverting input presenting a 1/8 unit load; in full-duplex mode it is not connected to the receiver.
13 RXP input Receiver phase control: tie to GND or leave open for normal receiver input polarity, and tie to VCC to reverse the receiver input phase.
14 VCC power_in Positive supply (recommended 3 V to 5.25 V per Table 6); bypass VCC to GND with a 0.1 µF capacitor.

Key specifications

Parameter Value
Manufacturer GEC
Package SOP-14
Category Interface
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Differential driver output, RS-422 load VOD2 2 伏 图 1,R=50Ω(RS-422) 2
Differential driver output, RS-485 load VOD2 1.5 伏 图 1,R=27Ω(RS-485) 2
Differential output voltage change (note 1) ∆VOD 0.2 伏 图 1,R =50ΩorR=27Ω 2
Driver output common-mode voltage VOC 3 伏 图 1,R=50ΩorR=27Ω 2
Common-mode voltage change (note 1) ∆VOC 0.2 伏 图 1,R=50ΩorR=27Ω 2
Input high voltage VIH1 2 伏 DE, DI, RE ，TXP,RXP,H/F 2
Input low voltage VIL1 0.8 伏 DE, DI, RE ，TXP,RXP,H/F 2
Input current, DE/DI/RE IIN1 -1 1 微安 DE, DI, RE (注 2) 2
Input current, Y/Z/A/B, bus pins at high input voltage IIN4 125 微安 DE = GND, VCC=GND or 3.6V, VIN=12V 2
Input current, Y/Z/A/B, bus pins at negative input voltage IIN4 -100 微安 DE = GND, VCC=GND or 3.6V, VIN=-7V 2
SRL input low voltage SRL_L 0.4 伏 2
Driver output short-circuit current IOD1 -100 25 毫安 -7V≤VOUT≤VCC 2
Driver output short-circuit current IOD1 25 100 毫安 0V≤VOUT≤12V 2
Driver output short-circuit current IOD1 -25 25 毫安 0V≤VOUT≤VCC 2
Receiver differential input threshold voltage VTH -200 -50 毫伏 -7V≤VCM≤+12V 2
Receiver output low voltage VOL 0.4 伏 IO=4mA,VID=-1V 3
Receiver output high-impedance leakage current IOZR -1 1 微安 0.4V≤VO≤2.4V 3
Receiver output short-circuit current IOSR -95 95 毫安 0V≤VRO≤VCC 3
Supply current, static, driver enabled ICC 0.8 1.5 毫安 No load, RE =GND, DI=GND or VCC, DE=VCC 3
Supply current, static, driver disabled ICC 0.8 1.5 毫安 No load, RE =GND, DI=GND or VCC, DE=GND 3
Shutdown current ISHDN 120 180 微安 DE GND,RE Vcc 3
ESD contact discharge, A and B pins (IEC 61000-4-2) -12 12 千伏 接触放电模型, IEC 61000-4-2, A管脚,B管脚 3
ESD human body model, A and B pins -15 15 千伏 人体模型 (A管脚,B管脚) 3
ESD human body model, other pins -4 4 千伏 人体模型 (其他管脚) 3
Maximum operating voltage VCC 7 V 10
Logic pin voltage -0.3 7 V DE，RE，DI，RO SRL，TXP，RXP，H/F 10
Bus pin voltage -8 13 ℃ A，B，Y，Z 10
Storage temperature TSTG -65 150 ℃ 10
Maximum junction temperature TJ 150 ℃ 10
ESD-HBM rating ESD-HBM 2000 V 10
Recommended operating supply voltage VDD 3 5.25 V 10
Operating temperature TA -40 125 ℃ 10
Driver propagation delay (SRL=VCC, 500 kbps) tDPLH, tDPHL 250 720 1000 纳秒 图 3 和 5, RDIFF=54 欧姆，CL=54pF 4
Driver rise/fall time (SRL=VCC, 500 kbps) tDR, tDF 400 700 1200 纳秒 图 3 和 5, RDIFF=54 欧姆，CL1=CL2=100pF 4
Receiver propagation delay (SRL=VCC, 500 kbps) tRPLH, tRPHL 125 250 纳秒 图7和9；/VID/≥2.0V；VID上升下降时间小于15纳秒 4
Chip shutdown time (SRL=VCC, 500 kbps) tSHDN 50 200 600 纳秒 注 3 4
Driver enable to output high (SRL=VCC, 500 kbps) tDZH 2500 纳秒 图 4 和 6,CL=100pF,S2 关断 4
Driver enable to output low (SRL=VCC, 500 kbps) tDZL 2500 纳秒 图 4 和 6,CL=100pF,S1 关断 4
Driver output low to disable (SRL=VCC, 500 kbps) tDLZ 500 纳秒 图 4 和 6, CL=15pF,S1 关断 4
Driver output high to disable (SRL=VCC, 500 kbps) tDHZ 500 纳秒 图 4 和 6, CL=15pF,S2 关断 4
Receiver enable to output low (SRL=VCC, 500 kbps) tRZL 20 120 纳秒 图 2 和 8, CL= 100pF,S1 关断 4
Receiver enable to output high (SRL=VCC, 500 kbps) tRZH 20 120 纳秒 图 2 和 8, CL=100pF,S2 关断 4
Receiver output high to disable (SRL=VCC, 500 kbps) tRZL 20 120 纳秒 图 2 和 8, CL=100pF,S1 关断 4
Receiver output low to disable (SRL=VCC, 500 kbps) tRHZ 20 120 纳秒 图 2 和 8, CL=100pF,S2 关断 4
Driver propagation delay (SRL=GND, 16 Mbps) tDPLH, tDPHL 10 100 纳秒 图 3 和 5, RDIFF=54 欧姆，CL=54pF 4
Driver rise/fall time (SRL=GND, 16 Mbps) tDR, tDF 20 50 纳秒 图 3 和 5, RDIFF=54 欧姆，CL1=CL2=100pF 4
Receiver propagation delay (SRL=GND, 16 Mbps) tRPLH, tRPHL 120 200 纳秒 图7和9；/VID/≥2.0V；VID上升下降时间小于15纳秒 5
Chip shutdown time (SRL=GND, 16 Mbps) tSHDN 200 600 纳秒 注 4 5
Driver enable to output high (SRL=GND, 16 Mbps) tDZH 30 200 纳秒 图 4 和 6,CL=100pF,S2 关断 5
Driver enable to output low (SRL=GND, 16 Mbps) tDZL 30 200 纳秒 图 4 和 6,CL=100pF,S1 关断 5
Driver output low to disable (SRL=GND, 16 Mbps) tDLZ 30 200 纳秒 图 4 和 6, CL=15pF,S1 关断 5
Driver output high to disable (SRL=GND, 16 Mbps) tDHZ 30 200 纳秒 图 4 和 6, CL=15pF,S2 关断 5
Receiver enable to output low (SRL=GND, 16 Mbps) tRZL 20 50 纳秒 图 2 和 8, CL= 100pF,S1 关断 5
Receiver enable to output high (SRL=GND, 16 Mbps) tRZH 20 50 纳秒 图 2 和 8, CL=100pF,S2 关断 5
Receiver output high to disable (SRL=GND, 16 Mbps) tRZL 20 50 纳秒 图 2 和 8, CL=100pF,S1 关断 5
Receiver output low to disable (SRL=GND, 16 Mbps) tRHZ 20 50 纳秒 图 2 和 8, CL=100pF,S2 关断 5
Input hysteresis VHYS 100 毫伏 DE, DI, RE ，TXP,RXP,H/F 2
Receiver differential threshold hysteresis ∆VTH 40 毫伏 2
Receiver input resistance RIN 96 千欧姆 -7V≤VCM≤+12V 3

CAD (KiCad official)

  • Symbol: WS3079
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: ws3079-etched.step / ws3079-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ws3079.step / ws3079.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: GEC datasheet (13 pp, sha256 76a7848bfb6b0627, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF