component

WM8974CGEFL

Public Made by Adom

by adom

Cirrus Logic Audio Interface ICs, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icswm8974cgeflfactory-2.0.0extractor-text

Verified WM8974CGEFL

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 25 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: WM8974CGEFL · QFN-24-EP(4x4) · 25 pins
  • ✓copper: 25 copper pads, none touching another net
  • ✓datasheet: all 25 pin names found in the 89-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1q0nt1i_/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 25 pins = 25 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 25 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ wm8974cgefl.kicad_sym✓ wm8974cgefl.kicad_mod✓ wm8974cgefl.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 11d ago
viewers wm8974cgefl: viewers · Ray 11d ago
package.json Publish 0.1.0 · Ray 11d ago
page.json Set visibility: public · Ray 11d ago
README.md Publish 0.1.0 · Ray 11d ago
verification.json Verified: Published by the parts factory: tier lcsc, 25 pins · Ray 11d ago
wm8974cgefl-etched.glb Publish 0.1.0 · Ray 11d ago
wm8974cgefl-etched.step wm8974cgefl: factory component page (tier=lcsc) · Ray 11d ago
wm8974cgefl-hero.glb wm8974cgefl: hero GLB from the etched model (keeps the MPN mark) · Ray 11d ago
wm8974cgefl-hero.overlay.json Publish 0.1.0 · Ray 11d ago
wm8974cgefl.glb Publish 0.1.0 · Ray 11d ago
wm8974cgefl.kicad_mod Publish 0.1.0 · Ray 11d ago
wm8974cgefl.kicad_sym Publish 0.1.0 · Ray 11d ago
wm8974cgefl.lbr Publish 0.1.0 · Ray 11d ago
wm8974cgefl.step Publish 0.1.0 · Ray 11d ago

WM8974CGEFL

Cirrus Logic · Audio Interface ICs · QFN-24-EP(4x4)

WM8974CGEFL from Cirrus Logic, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MICBIAS output Microphone bias output for electret microphones.
2 AVDD power_in Analogue supply feeding the ADC and DAC, specified at 2.5V to 3.6V with an absolute maximum of +4.2V.
3 AGND power_in Analogue ground feeding the ADC and DAC; analogue and digital grounds must always be within 0.3V of each other.
4 DCVDD power_in Digital core supply specified at 1.71V to 3.6V, and must be 1.9V or higher when the PLL is used.
5 DBVDD power_in Digital buffer (input/output) supply specified at 1.71V to 3.6V, subject to the DCVDD relationship in the recommended operating conditions notes.
6 DGND power_in Digital ground; analogue and digital grounds must always be within 0.3V of each other.
7 ADCDAT output ADC digital audio data output.
8 DACDAT input DAC digital audio data input.
9 FRAME bidirectional DAC and ADC sample rate clock or frame synch, configured as an input or, in master mode, an output generated by the WM8974.
10 BCLK bidirectional Digital audio port clock, configured as an input or, in master mode, an output generated by the WM8974.
11 MCLK input Master clock input, which can be used directly or through the on-chip PLL.
12 CSB/GPIO bidirectional 3-wire MPU chip select or general purpose input/output pin; GPIO function is only available in 2-wire mode.
13 SCLK input 3-wire MPU clock input or 2-wire MPU clock input.
14 SDIN bidirectional 3-wire MPU data input or 2-wire MPU data input.
15 MODE input Control interface mode selection pin: low selects 2-wire mode and high selects 3-wire mode.
16 MONOOUT output Mono line output.
17 SPKOUTP output Positive speaker output.
18 SPKGND power_in Speaker ground feeding the speaker and mono output amplifiers only.
19 SPKOUTN output Negative speaker output.
20 SPKVDD power_in Speaker supply feeding the speaker and mono output amplifiers only, specified at 2.5V to 5.5V with an absolute maximum of +7V.
21 AUX input Auxiliary analogue input.
22 VMID passive Decoupling pin for the midrail reference voltage.
23 MICN input Negative microphone input.
24 MICP input Positive microphone input (common mode).
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Cirrus Logic
Package QFN-24-EP(4x4)
Category Interface ICs
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Digital supply range (Core) DCVDD 1.71 3.6 V 5
Digital supply range (Buffer) DBVDD 1.71 3.6 V 5
Analogue supplies range AVDD 2.5 3.6 V 5
Speaker supply SPKVDD 2.5 5.5 V 5
Ground DGND,AGND,SPKGND (single printed value 0 V; column not clear in extraction) 0 V 5
DBVDD, DCVDD, AVDD supply voltages -0.3 4.2 V 5
SPKVDD supply voltage -0.3 7 V 5
Voltage range digital inputs -0.3 V Minimum relative to DGND; maximum printed as DVDD +0.3V (not a fixed number) 5
Voltage range analogue inputs -0.3 V Minimum relative to AGND; maximum printed as AVDD +0.3V (not a fixed number) 5
Operating temperature range TA -40 85 C 5
Storage temperature after soldering -65 150 C 5
MIC PGA Programmable Gain -12 35.25 dB 6
Selectable Input Gain Boost 0 20 dB 6
ALC Target Record Level -28.5 -6 dB 6
ALC Programmable Gain -12 35.25 dB 6
Gain Hold Time tHOLD 0 43691 ms MCLK=12.288MHz; time doubles with each step 6
Gain Ramp-Up (Decay) Time tDCY 3.3 3360 ms ALCMODE=0 (ALC), MCLK=12.288MHz; time doubles with each step 6
Gain Ramp-Up (Decay) Time (limiter) tDCY 0.73 744 ms ALCMODE=1 (limiter), MCLK=12.288MHz; time doubles with each step 6
Gain Ramp-Down (Attack) Time tATK 0.83 852 ms ALCMODE=0 (ALC), MCLK=12.288MHz; time doubles with each step 6
Gain Ramp-Down (Attack) Time (limiter) tATK 0.18 186 ms ALCMODE=1 (limiter), MCLK=12.288MHz; time doubles with each step 6
ADC Signal to Noise Ratio SNR 85 94 dB A-weighted, 0dB PGA gain 6
ADC Total Harmonic Distortion THD -75 -83 dB -1dBFS input, 0dB PGA gain 6
DAC to MONO Signal to Noise Ratio SNR 90 98 dB A-weighted 7
Speaker Output PGA Programmable Gain -57 6 dB 7
BTL Speaker Signal to Noise Ratio SNR 90 101 dB SPKVDD=3.3V, RL = 8 7
Digital Input HIGH Level VIH 0.7 x DVDD 7
Digital Input LOW Level VIL 0.3 x DVDD 7
Digital Output HIGH Level VOH 0.9 x DVDD IOL=1mA 7
Digital Output LOW Level VOL 0.1 x DVDD IOH-1mA 7
ADC Path Total Group Delay (EQ disabled) 26 28 30 /fs 78
ADC Path Total Group Delay (EQ enabled) 27 29 31 /fs 78
DAC Path Total Group Delay (EQ disabled) 34 36 38 /fs 78
DAC Path Total Group Delay (EQ enabled) 35 37 39 /fs 78

CAD (KiCad official)

  • Symbol: WM8974CGEFL
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: wm8974cgefl-etched.step / wm8974cgefl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); wm8974cgefl.step / wm8974cgefl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cirrus Logic datasheet (89 pp, sha256 0f03918969831df6, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF