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WL9005P3-33
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WPMtek Wei Pan Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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WL9005P3-33
WPMtek Wei Pan Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
WL9005P3-33 from WPMtek Wei Pan Microelectronics, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin; the datasheet asks for input and output capacitor ground returns to run back to this pin using as wide and as short a copper trace as practical. |
| 2 | VIN | power_in | Power input with a recommended operating range of 2.0V to 7.0V (absolute maximum -0.3V to 9V), and at least a 1µF ceramic input capacitor placed as close to the pin as possible. |
| 3 | VOUT | power_out | Regulated output selectable from 0.8V to 5.0V in 0.05V steps (3.3V for the WL9005P3-33), requiring a ceramic output capacitor of at least 1µF (X7R or X5R) placed close to VOUT and GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WPMtek Wei Pan Microelectronics |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2 | 7 | V | 5 | ||
| Quiescent Current | IQ | 0.3 | 0.5 | µA | VIN >VOUTNOM, VIN=EN, IOUT=0mA | 5 | |
| Shutdown Current | ISHDN | 0 | 0.1 | µA | EN=0 V, VOUT =0 V | 5 | |
| Output Voltage (min/max printed as multiplier of VOUT) | VOUT | 0.985 | 1.015 | x VOUT | VIN = VOUTNOM +1V, IOUT =10mA | 5 | |
| Output Current | IOUT | 500 | mA | VIN = VOUTNOM +1V | 5 | ||
| Dropout Voltage | VDROP | 600 | 750 | mV | VOUT =3.3V, IOUT =500mA | 5 | |
| Load Regulation | ΔVLOAD | 5 | 20 | mV | VIN = VOUTNOM +1V, 1mA≦IOUT≦100mA | 5 | |
| EN Threshold Voltage CE High | VCEH | 1.2 | V | CE High Voltage | 5 | ||
| EN Threshold Voltage CE Low | VCEL | 0.4 | V | CE Low Voltage | 5 | ||
| Temperature Coefficient | ΔVOUT/ΔT * VOUT | -100 | 100 | ppm/°C | IOUT =30mA, TA=0~70°C | 5 | |
| Thermal Shutdown Temperature | TSHDN | 160 | °C | 5 | |||
| Supply Input Voltage (absolute maximum) | VIN | -0.3 | 9 | V | 4 | ||
| EN to GND (absolute maximum) | VEN | -0.3 | 9 | V | 4 | ||
| Regulated Output Voltage (absolute maximum) | VOUT | -0.3 | 5 | V | 4 | ||
| ESD Human Body Model | HBM | -4000 | 4000 | V | Human Body Model (HBM) | 4 | |
| ESD Charged Device Model | CDM | -2000 | 2000 | V | Charged Device Mode (CDM) | 4 | |
| ESD Machine Model | MM | 200 | V | Machine Mode (MM) | 4 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Operating Junction Temperature | TJ | 150 | °C | 4 | |||
| Lead Temperature (Soldering) | TLEAD | 260 | °C | Soldering 10s | 4 | ||
| Power Dissipation SOT89-3L | PD | 700 | mW | TA=+25°C | 4 | ||
| Operating Ambient Temperature | -40 | 85 | °C | 4 | |||
| Output Voltage | VOUT | 0.8 | 5 | V | 4 | ||
| Thermal Resistance Junction to Air SOT89-3L | θJA | 180 | °C/W | Junction to air, per JESD 51-7 | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | and output capacitors must be back to the WL9005 ground pin using as wide and as short of a copper trace as is practical.Connections using long trace lengths, narrow trace widths, and/or | 10 |
CAD (KiCad official)
- Symbol:
WL9005P3-33 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
wl9005p3-33-etched.step/wl9005p3-33-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);wl9005p3-33.step/wl9005p3-33.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WPMtek Wei Pan Microelectronics datasheet (11 pp, sha256
2ed7848826dfb0c6, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# WL9005P3-33
**WPMtek Wei Pan Microelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
WL9005P3-33 from WPMtek Wei Pan Microelectronics, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin; the datasheet asks for input and output capacitor ground returns to run back to this pin using as wide and as short a copper trace as practical. |
| 2 | VIN | power_in | Power input with a recommended operating range of 2.0V to 7.0V (absolute maximum -0.3V to 9V), and at least a 1µF ceramic input capacitor placed as close to the pin as possible. |
| 3 | VOUT | power_out | Regulated output selectable from 0.8V to 5.0V in 0.05V steps (3.3V for the WL9005P3-33), requiring a ceramic output capacitor of at least 1µF (X7R or X5R) placed close to VOUT and GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WPMtek Wei Pan Microelectronics |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2 | | 7 | V | | 5 |
| Quiescent Current | IQ | | 0.3 | 0.5 | µA | VIN >VOUTNOM, VIN=EN, IOUT=0mA | 5 |
| Shutdown Current | ISHDN | 0 | | 0.1 | µA | EN=0 V, VOUT =0 V | 5 |
| Output Voltage (min/max printed as multiplier of VOUT) | VOUT | 0.985 | | 1.015 | x VOUT | VIN = VOUTNOM +1V, IOUT =10mA | 5 |
| Output Current | IOUT | 500 | | | mA | VIN = VOUTNOM +1V | 5 |
| Dropout Voltage | VDROP | | 600 | 750 | mV | VOUT =3.3V, IOUT =500mA | 5 |
| Load Regulation | ΔVLOAD | | 5 | 20 | mV | VIN = VOUTNOM +1V, 1mA≦IOUT≦100mA | 5 |
| EN Threshold Voltage CE High | VCEH | 1.2 | | | V | CE High Voltage | 5 |
| EN Threshold Voltage CE Low | VCEL | | | 0.4 | V | CE Low Voltage | 5 |
| Temperature Coefficient | ΔVOUT/ΔT * VOUT | -100 | | 100 | ppm/°C | IOUT =30mA, TA=0~70°C | 5 |
| Thermal Shutdown Temperature | TSHDN | | | 160 | °C | | 5 |
| Supply Input Voltage (absolute maximum) | VIN | -0.3 | | 9 | V | | 4 |
| EN to GND (absolute maximum) | VEN | -0.3 | | 9 | V | | 4 |
| Regulated Output Voltage (absolute maximum) | VOUT | -0.3 | | 5 | V | | 4 |
| ESD Human Body Model | HBM | -4000 | | 4000 | V | Human Body Model (HBM) | 4 |
| ESD Charged Device Model | CDM | -2000 | | 2000 | V | Charged Device Mode (CDM) | 4 |
| ESD Machine Model | MM | | | 200 | V | Machine Mode (MM) | 4 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 4 |
| Operating Junction Temperature | TJ | | | 150 | °C | | 4 |
| Lead Temperature (Soldering) | TLEAD | | | 260 | °C | Soldering 10s | 4 |
| Power Dissipation SOT89-3L | PD | | | 700 | mW | TA=+25°C | 4 |
| Operating Ambient Temperature | | -40 | | 85 | °C | | 4 |
| Output Voltage | VOUT | 0.8 | | 5 | V | | 4 |
| Thermal Resistance Junction to Air SOT89-3L | θJA | | 180 | | °C/W | Junction to air, per JESD 51-7 | 4 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | and output capacitors must be back to the WL9005 ground pin using as wide and as short of a copper trace as is practical.Connections using long trace lengths, narrow trace widths, and/or | 10 |
## CAD (KiCad official)
- Symbol: `WL9005P3-33`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `wl9005p3-33-etched.step` / `wl9005p3-33-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wl9005p3-33.step` / `wl9005p3-33.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [WPMtek Wei Pan Microelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757102223295950848) (11 pp, sha256 `2ed7848826dfb0c6`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/wl9005p3-33-datasheet.pdf)