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WL9005HS5-33

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WPMtek Wei Pan Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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WL9005HS5-33

WPMtek Wei Pan Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L

WL9005HS5-33 from WPMtek Wei Pan Microelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input pin; the operating input voltage range is 1.2 V to 6.0 V, and a 1 uF ceramic input capacitor is recommended between VIN and GND.
2 GND power_in Ground pin, which must be connected to the input capacitor and output capacitor returns, with a wide copper trace recommended for both VIN and GND.
3 EN input Enable pin; the device is enabled when EN is at or above 0.83 V (VENH min) and shut down when EN is at or below 0.78 V (VENL max).
4 NC unconnected No connection pin on the SOT23-5 package.
5 VOUT power_out Regulated output pin; fixed output options from 1.2 V to 3.6 V with ±2% tolerance and up to 500 mA output current, requiring at least 1 uF of ceramic output capacitance placed close to VOUT and GND.

Key specifications

Parameter Value
Manufacturer WPMtek Wei Pan Microelectronics
Package SOT-23-5L
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage range (operating input voltage) VIN 1.2 6 V 4
Output current IOUT_MAX 500 mA 4
EN high level VENH 0.83 V Enabled 4
EN low level VENL 0.78 V Shutdown 4
VIN to GND VIN to GND -0.3 6 V 3
VOUT to GND VOUT to GND -0.3 5 V 3
VIN to VOUT VIN to VOUT -0.3 5 V 3
EN to GND EN to GND -0.3 6 V 3
Operating temperature range -40 125 ℃ 3
Storage temperature -40 150 ℃ 3
Power dissipation 600 mW SOT23-5 3
ESD Human body model (HBM) VESD 4 KV Human body model (HBM) 3
ESD Charged device model (CDM) VESD 200 V Charged device model (CDM) 3
Output voltage tolerance -2 2 % 1
Thermal resistance (junction to ambient) 200 ℃/W Junction to ambient, SOT23-5 3
Quiescent current IGND 0.2 uA VIN=5V, No load 4
Dropout voltage VDROP 130 mV IOUT=100mA, VIN=VOUTNOM-0.1V 4
Load regulation ΔVOUT/ΔIOUT 0.1 mV/mA VIN=VOUTNOM+1V, 1mA≤IOUT≤200mA 4
Line regulation ΔVOUT/ΔVIN 0.1 mV/V IOUT=1mA, VOUTNOM+1V≤VIN≤6V 4
Current limit ILIMIT 550 mA VIN=VOUTNOM+1V 4
Short current ISHORT 80 mA 4
Thermal shutdown temperature (shutdown, increasing) TSHDN 150 ℃ Shutdown, temperature increasing 4
Thermal shutdown temperature (reset, decreasing) TSHDN 120 ℃ Reset, temperature decreasing 4

CAD (KiCad official)

  • Symbol: WL9005HS5-33
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5L (KiCad packages3D, STEP)
  • 3D model files: wl9005hs5-33-etched.step / wl9005hs5-33-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); wl9005hs5-33.step / wl9005hs5-33.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WPMtek Wei Pan Microelectronics datasheet (11 pp, sha256 030e3f5d58452b70, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF