component
WL9005HS5-30
Public Made by Adomby adom
WPMtek Wei Pan Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7d ago |
| viewers | 7d ago |
| package.json | 7d ago |
| page.json | 7d ago |
| README.md | 7d ago |
| wl9005hs5-30-etched.glb | 7d ago |
| wl9005hs5-30-etched.step | 7d ago |
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| wl9005hs5-30.step | 7d ago |
WL9005HS5-30
WPMtek Wei Pan Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L
WL9005HS5-30 from WPMtek Wei Pan Microelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input pin for the LDO; the operating input voltage range is 1.2 V to 6.0 V, and a 1 uF ceramic capacitor is recommended between VIN and GND. |
| 2 | GND | power_in | Ground pin; a wide copper trace is required for both VIN and GND on the PCB. |
| 3 | EN | input | Enable pin; EN must be at or above 0.83 V to enable the output and at or below 0.78 V to shut down, with an absolute maximum of 6 V to GND. |
| 4 | NC | unconnected | No connection pin. |
| 5 | VOUT | power_out | Regulated output pin, rated for up to 500 mA, which requires a minimum 1 uF ceramic output capacitor (X5R or X7R) placed close to VOUT and GND for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WPMtek Wei Pan Microelectronics |
| Package | SOT-23-5L |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VIN | 1.2 | 6 | V | 4 | ||
| EN high level | VENH | 0.83 | V | Enabled | 4 | ||
| EN low level | VENL | 0.78 | V | Shutdown | 4 | ||
| Output current | IOUT_MAX | 500 | mA | 4 | |||
| Output voltage tolerance | -2 | 2 | % | Printed as ±2% in Features | 1 | ||
| Input voltage VIN to GND | -0.3 | 6 | V | 3 | |||
| Output voltage VOUT to GND | -0.3 | 5 | V | 3 | |||
| Input to output voltage VIN to VOUT | -0.3 | 5 | V | 3 | |||
| EN to GND voltage | -0.3 | 6 | V | 3 | |||
| Operating temperature range | -40 | 125 | ℃ | 3 | |||
| Storage temperature | -40 | 150 | ℃ | 3 | |||
| ESD human body model (HBM) | VESD | 4 | KV | Human body model (HBM) | 3 | ||
| ESD charged device model (CDM) | VESD | 200 | V | Charged device model (CDM) | 3 | ||
| Thermal resistance junction to ambient, SOT23-5 | 200 | ℃/W | Junction to ambient; table does not label min/typ/max | 3 |
CAD (KiCad official)
- Symbol:
WL9005HS5-30 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files:
wl9005hs5-30-etched.step/wl9005hs5-30-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);wl9005hs5-30.step/wl9005hs5-30.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WPMtek Wei Pan Microelectronics datasheet (11 pp, sha256
030e3f5d58452b70, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).