Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

WL9005HS5-15

WPMtek Wei Pan Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L

WL9005HS5-15 from WPMtek Wei Pan Microelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input pin; operating input voltage is 1.2 V to 6.0 V, with a 1 µF ceramic capacitor recommended close to the device between VIN and GND.
2 GND power_in Ground pin, which serves as the return for the input and output capacitors and should be connected with a wide copper trace.
3 EN input Enable pin; a level of at least 0.83 V enables the regulator and a level of 0.78 V or lower puts it in shutdown.
4 NC unconnected No connection.
5 VOUT power_out Output pin, which sources up to 500 mA with a fixed output voltage; a minimum 1 µF ceramic output capacitor (X5R or X7R) is required for stability and should be placed as close as possible to VOUT and GND.

Key specifications

Parameter Value
Manufacturer WPMtek Wei Pan Microelectronics
Package SOT-23-5L
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating input voltage VIN 1.2 6 V 4
VIN to GND VIN -0.3 6 V 3
VOUT to GND VOUT -0.3 5 V 3
VIN to VOUT VIN-VOUT -0.3 5 V 3
EN to GND EN -0.3 6 V 3
Operating temperature range TA -40 125 ℃ 3
Storage temperature TSTG -40 150 ℃ 3
Output current IOUT_MAX 500 mA 4
EN high level VENH 0.83 V Enabled 4
EN low level VENL 0.78 V Shutdown 4
Output voltage tolerance VOUT -2 2 % Printed ±2% output voltage tolerance (Features); applies to VOUTNOM = 1.5 V 1
Power dissipation SOT23-5 PD 600 mW SOT23-5 3
ESD human body model (HBM) VESD 4 KV HBM 3
ESD charged device model (CDM) VESD 200 V CDM 3
Quiescent current IGND 0.2 uA VIN=5V, No load 4
Dropout voltage VDROP 130 mV IOUT=100mA, VIN=VOUTNOM-0.1V 4
Load regulation ΔVOUT/ΔIOUT 0.1 mV/mA VIN=VOUTNOM+1V, 1mA≤IOUT≤200mA 4
Line regulation ΔVOUT/ΔVIN 0.1 mV/V IOUT=1mA, VOUTNOM+1V≤VIN≤6V 4
Current limit ILIMIT 550 mA VIN=VOUTNOM+1V 4
Short current ISHORT 80 mA 4
Thermal shutdown temperature (shutdown, increasing) TSHDN 150 ℃ Shutdown, temperature increasing 4
Thermal shutdown temperature (reset, decreasing) TSHDN 120 ℃ Reset, temperature decreasing 4
Thermal resistance junction to ambient θJA 200 ℃/W Junction to ambient, SOT23-5 3

CAD (KiCad official)

  • Symbol: WL9005HS5-15
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5L (KiCad packages3D, STEP)
  • 3D model files: wl9005hs5-15-etched.step / wl9005hs5-15-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); wl9005hs5-15.step / wl9005hs5-15.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WPMtek Wei Pan Microelectronics datasheet (11 pp, sha256 030e3f5d58452b70, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF