component
WGI210AT S LJXR
Public Made by Adomby adom
Intel/Altera Others, QFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536
{
"slug": "wgi210at-s-ljxr",
"version": "0.1.0",
"type": "component",
"description": "Intel/Altera Others, QFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"others",
"wgi210at s ljxr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"wgi210at-s-ljxr.kicad_sym",
"wgi210at-s-ljxr.kicad_mod",
"wgi210at-s-ljxr.glb",
"wgi210at-s-ljxr.step",
"wgi210at-s-ljxr.lbr",
"docs/hero.png",
"docs/wgi210at-s-ljxr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"wgi210at-s-ljxr-hero.glb",
"wgi210at-s-ljxr-hero.overlay.json",
"wgi210at-s-ljxr-etched.glb"
],
"component": {
"mpn": "WGI210AT S LJXR",
"manufacturer": "Intel/Altera",
"package": "QFN-64(9x9)",
"pin_count": 65,
"category": "Others",
"subcategory": "Others",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/55920bb37ba695522d538e54694c34f4.pdf",
"parts": {
"symbol": "wgi210at-s-ljxr.kicad_sym",
"footprint": "wgi210at-s-ljxr.kicad_mod",
"model_3d": "wgi210at-s-ljxr-hero.glb",
"model_3d_plain": "wgi210at-s-ljxr-etched.glb",
"model_3d_step": "wgi210at-s-ljxr-etched.step",
"model_3d_step_plain": "wgi210at-s-ljxr.step",
"lbr": "wgi210at-s-ljxr.lbr"
},
"distributor_links": {
"lcsc": "C7433263",
"mouser": "607-WGI210ATSLJXR"
},
"distributor_check": {
"checked_at": "2026-10-23T03:19:00Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": "607-WGI210ATSLJXR",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "LAN_PWR_GOOD",
"type": "input",
"description": "LAN power-good input; no internal pull-up in any state, external pull-up is listed."
},
{
"number": "2",
"name": "NC_SI_CLK_IN",
"type": "input",
"description": "NC-SI reference clock input, high-impedance when active, external pull-down listed."
},
{
"number": "3",
"name": "NC_SI_CRS_DV",
"type": "output",
"description": "NC-SI carrier sense/receive data valid signal, high-impedance when active, external pull-down listed."
},
{
"number": "4",
"name": "JTAG_TDO",
"type": "output",
"description": "JTAG test data output, open-drain, to be connected to VCC33 through a 3.3 K pull-up."
},
{
"number": "5",
"name": "NC_SI_RXD1",
"type": "output",
"description": "NC-SI receive data bit 1, high-impedance when active, external pull-up listed."
},
{
"number": "6",
"name": "NC_SI_RXD0",
"type": "output",
"description": "NC-SI receive data bit 0, high-impedance when active, external pull-up listed."
},
{
"number": "7",
"name": "NC_SI_TX_EN",
"type": "input",
"description": "NC-SI transmit enable input, high-impedance when active, external pull-down listed."
},
{
"number": "8",
"name": "NC_SI_TXD1",
"type": "input",
"description": "NC-SI transmit data bit 1, high-impedance when active, external pull-up listed."
},
{
"number": "9",
"name": "NC_SI_TXD0",
"type": "input",
"description": "NC-SI transmit data bit 0, high-impedance when active, external pull-up listed."
},
{
"number": "10",
"name": "VDD3p3",
"type": "power_in",
"description": "3.3 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "11",
"name": "VDD0p9",
"type": "power_in",
"description": "0.9 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "12",
"name": "NVM_SI",
"type": "output",
"description": "Serial Flash (SPI) data input line to the Flash, with an internal pull-up (about 30 K) in the disable state."
},
{
"number": "13",
"name": "NVM_SK",
"type": "output",
"description": "Serial Flash (SPI) clock output, with internal pull-up in power-up and disable states."
},
{
"number": "14",
"name": "NVM_SO",
"type": "input",
"description": "Serial Flash (SPI) data output from the Flash, with internal pull-up in power-up, active and disable states."
},
{
"number": "15",
"name": "NVM_CS_N",
"type": "output",
"description": "Serial Flash (SPI) chip select, active low, with internal pull-up in power-up and disable states."
},
{
"number": "16",
"name": "PE_WAKE_N",
"type": "bidirectional",
"description": "PCIe wake signal that also carries OBFF; external pull-up listed."
},
{
"number": "17",
"name": "PE_RST_N",
"type": "input",
"description": "PCIe reset input, external pull-up listed."
},
{
"number": "18",
"name": "JTAG_TMS",
"type": "input",
"description": "JTAG test mode select, to be connected to VCC33 through a 3.3 K pull-up."
},
{
"number": "19",
"name": "JTAG_CLK",
"type": "input",
"description": "JTAG test clock input, to be connected to ground through a 3.3 K pull-down."
},
{
"number": "20",
"name": "PE_Tn",
"type": "output",
"description": "PCIe v2.1 (2.5 GT/s) x1 transmit differential pair, negative."
},
{
"number": "21",
"name": "PE_Tp",
"type": "output",
"description": "PCIe v2.1 (2.5 GT/s) x1 transmit differential pair, positive."
},
{
"number": "22",
"name": "NC",
"type": "unconnected",
"description": "No connect."
},
{
"number": "23",
"name": "PE_Rn",
"type": "input",
"description": "PCIe v2.1 (2.5 GT/s) x1 receive differential pair, negative."
},
{
"number": "24",
"name": "PE_Rp",
"type": "input",
"description": "PCIe v2.1 (2.5 GT/s) x1 receive differential pair, positive."
},
{
"number": "25",
"name": "PECLKn",
"type": "input",
"description": "PCIe reference clock differential input, negative."
},
{
"number": "26",
"name": "PECLKp",
"type": "input",
"description": "PCIe reference clock differential input, positive."
},
{
"number": "27",
"name": "VDD3p3",
"type": "power_in",
"description": "3.3 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "28",
"name": "DEV_OFF_N",
"type": "input",
"description": "Device-off control input (active low) used for the device disable function."
},
{
"number": "29",
"name": "JTAG_TDI",
"type": "input",
"description": "JTAG test data input, to be connected to VCC33 through a 3.3 K pull-up."
},
{
"number": "30",
"name": "LED1",
"type": "output",
"description": "LED driver output, also the XOR tree output in XOR test mode."
},
{
"number": "31",
"name": "LED0",
"type": "output",
"description": "Configurable LED driver output."
},
{
"number": "32",
"name": "VDD0p9",
"type": "power_in",
"description": "0.9 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "33",
"name": "LED2",
"type": "output",
"description": "Configurable LED driver output."
},
{
"number": "34",
"name": "SMB_CLK",
"type": "bidirectional",
"description": "SMBus clock; external pull-up listed."
},
{
"number": "35",
"name": "SMB_ALRT_N",
"type": "bidirectional",
"description": "SMBus alert, active low; external pull-up listed."
},
{
"number": "36",
"name": "SMB_DAT",
"type": "bidirectional",
"description": "SMBus data; external pull-up listed."
},
{
"number": "37",
"name": "CBOT",
"type": "passive",
"description": "Bottom capacitor connection for the integrated switching regulator (15 uF per Figure 12-22)."
},
{
"number": "38",
"name": "VDD0p9_OUT",
"type": "power_out",
"description": "Integrated 0.9 V switching regulator output, to be fed back to the VDD0p9 pins."
},
{
"number": "39",
"name": "VDD1p5_OUT",
"type": "power_out",
"description": "Integrated 1.5 V switching regulator output, to be fed back to the VDD1p5 pins."
},
{
"number": "40",
"name": "CTOP",
"type": "passive",
"description": "Top capacitor connection for the integrated switching regulator (15 uF per Figure 12-22)."
},
{
"number": "41",
"name": "VDD3p3",
"type": "power_in",
"description": "3.3 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "42",
"name": "VDD0p9",
"type": "power_in",
"description": "0.9 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "43",
"name": "NC_SI_ARB_IN",
"type": "input",
"description": "NC-SI hardware arbitration input, high-impedance when active."
},
{
"number": "44",
"name": "NC_SI_ARB_OUT",
"type": "output",
"description": "NC-SI hardware arbitration output, stable high output in power-up."
},
{
"number": "45",
"name": "XTAL2",
"type": "passive",
"description": "Crystal oscillator connection, output side."
},
{
"number": "46",
"name": "XTAL1",
"type": "input",
"description": "Crystal oscillator connection, input side or external clock input."
},
{
"number": "47",
"name": "VDD1p5",
"type": "power_in",
"description": "1.5 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "48",
"name": "RSET",
"type": "passive",
"description": "Analog bias reference resistor connection."
},
{
"number": "49",
"name": "MDI_MINUS[3]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 3, negative."
},
{
"number": "50",
"name": "MDI_PLUS[3]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 3, positive."
},
{
"number": "51",
"name": "VDD3p3",
"type": "power_in",
"description": "In BASE-T, 3.3 V analog power supply to the GPHY."
},
{
"number": "52",
"name": "MDI_MINUS[2]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 2, negative."
},
{
"number": "53",
"name": "MDI_PLUS[2]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 2, positive."
},
{
"number": "54",
"name": "MDI_MINUS[1]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 1, negative."
},
{
"number": "55",
"name": "MDI_PLUS[1]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 1, positive."
},
{
"number": "56",
"name": "VDD1p5",
"type": "power_in",
"description": "In BASE-T, 1.5 V analog power supply to the GPHY."
},
{
"number": "57",
"name": "MDI_MINUS[0]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 0, negative."
},
{
"number": "58",
"name": "MDI_PLUS[0]",
"type": "bidirectional",
"description": "Copper PHY MDI differential pair 0, positive."
},
{
"number": "59",
"name": "VDD0p9",
"type": "power_in",
"description": "0.9 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "60",
"name": "SDP3",
"type": "bidirectional",
"description": "Software-definable pin 3, configurable as input, GPI input or output."
},
{
"number": "61",
"name": "SDP1",
"type": "bidirectional",
"description": "Software-definable pin 1 (also marked PCIe_DIS), with internal pull-up until Flash auto-load is done."
},
{
"number": "62",
"name": "SDP2",
"type": "bidirectional",
"description": "Software-definable pin 2, with internal pull-up until Flash auto-load is done; can carry I2C."
},
{
"number": "63",
"name": "SDP0",
"type": "bidirectional",
"description": "Software-definable pin 0, with internal pull-up until Flash auto-load is done; can carry I2C."
},
{
"number": "64",
"name": "VDD3p3",
"type": "power_in",
"description": "3.3 V supply pin, one decoupling capacitor per VDD pin recommended."
},
{
"number": "65",
"name": "E_PAD_GND",
"type": "power_in",
"description": "Exposed pad, which is ground."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The provided pages do not include the pin description tables (Section 2.3). Pin types and descriptio; The pin assignment figure is flattened text, so the Copper/SerDes column mapping for pins 49-58 was ; The exposed pad is not numbered in the figure. Number 65 is taken from the E_PAD_GND label in Figure",
"9/65 pins cited to the wrong page (name found elsewhere): ['18:JTAG_TMS@p845', '19:JTAG_CLK@p845', '29:JTAG_TDI@p845', '31:LED0@p11']"
],
"pages_sent": 30,
"cost_usd": 0.3897,
"at": "2026-10-23T03:18:44"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/55920bb37ba695522d538e54694c34f4.pdf",
"pages": 870,
"sha256": "f57605388f62a6a2",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 65,
"described": 65,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "wgi210at-s-ljxr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
0.75
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "wgi210at-s-ljxr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9.0,
9.0,
0.75
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "68b130ff1a32d75fa220ae79a2ff80a94df85913ef69492a86b5f709b5966fc8",
"checked": "2026-10-23",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}