component
WD1035DH-8
Public Made by Adomby adom
WILLSEMI Will Semicon DC-DC Converters, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
WD1035DH-8
WILLSEMI Will Semicon · DC-DC Converters · DFN-8-EP(2x2)
WD1035DH-8 from WILLSEMI Will Semicon, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback pin connected to the feedback resistor for the adjustable version or to VOUT for the fixed-output version. |
| 2 | PG | output | Power-good open-drain output with an external pull-up resistor; it is high when FB is within 90% of nominal and low otherwise, and is specified to sink up to 1 mA. |
| 3 | IN | power_in | Input pin with an operating range of 2.7V to 5.5V that must be decoupled to GND with at least 10uF ceramic capacitance. |
| 4 | PGND | power_in | Power ground, which must be connected to the exposed pad and a large copper area for maximum power dissipation. |
| 5 | NC | unconnected | No internal connection. |
| 6 | LX | output | Inductor pin (switching node) connecting the internal power switches to the output inductor. |
| 7 | EN | input | Enable control that turns the regulator on when pulled high (VIH 1.4V min, VIL 0.4V max) and must not be left floating. |
| 8 | SGND | power_in | Signal ground for the control circuitry. |
| 9 | Exposed Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WILLSEMI Will Semicon |
| Package | DFN-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operation Voltage Range | VIN | 2.7 | 5.5 | V | 4 | ||
| Feedback Reference | VREF | 0.588 | 0.6 | 0.612 | V | 4 | |
| EN Input LOW Voltage | VIL | 0.4 | V | 4 | |||
| EN Input HIGH Voltage | VIH | 1.4 | V | 4 | |||
| Input OVP shutdown (falling) | VOVP | 5.6 | 6 | V | Falling | 4 | |
| Power Supply | VCC | -0.3 | 6.5 | V | 3 | ||
| Others Pins | -0.3 | V | 3 | ||||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Power Supply | VCC | 2.7 | 5.5 | V | 3 | ||
| Junction temperature | TJ | -40 | 125 | °C | 3 | ||
| Ambient temperature | TA | -40 | 85 | °C | 3 | ||
| Junction Temperature | TJ | 150 | °C | 3 | |||
| Lead Temperature (Soldering,10 sec) | 260 | °C | 10 sec soldering | 3 | |||
| Power Dissipation | PD | 2.19 | W | TA =25℃, DFN2X2-8L | 3 | ||
| ESD HBM | 2000 | V | 3 | ||||
| ESD CDM | 2000 | V | 3 | ||||
| Undervoltage Lockout rising | VUVLO-H | 2.45 | V | VIN Rising | 4 | ||
| Undervoltage Lockout falling | VUVLO-L | 2.25 | V | VIN Falling | 4 | ||
| Quiescent Current | IQ | 45 | uA | Switching | 4 | ||
| Shutdown Current | ISD | 1 | μA | VEN =GND, VIN =3.6V | 4 | ||
| Line Regulation | ΔVOUT /ΔVIN | 0.35 | %/V | 4 | |||
| PFET Rdson | Rdson P | 100 | mΩ | 4 | |||
| NFET Rdson | Rdson N | 60 | mΩ | 4 | |||
| PFET Current Limit | ILIMT | 4.5 | A | 4 | |||
| Oscillator Frequency | FOSC | 1.5 | MHz | 4 | |||
| Max Duty Cycle | 100 | % | 4 | ||||
| Soft Start Time | 800 | uS | 4 | ||||
| Power on delay time | 25 | uS | 4 | ||||
| Input OVP shutdown (rising) | VOVP | 6.3 | V | Rising | 4 | ||
| Over Voltage Protection Blanking Time | 20 | uS | 4 | ||||
| Thermal Shutdown | 150 | °C | 4 | ||||
| Thermal Shutdown Hysteresis | 30 | °C | 4 | ||||
| Package Thermal Resistance Junction-to-Ambient | TJA | 50 | °C /W | 3 | |||
| Package Thermal Resistance Junction-to-Case | TJC | 8 | °C /W | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 3) The PCB copper area associated with SW pin | 10 |
CAD (KiCad official)
- Symbol:
WD1035DH-8 - Footprint:
Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm - 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
wd1035dh-8-etched.step/wd1035dh-8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);wd1035dh-8.step/wd1035dh-8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WILLSEMI Will Semicon datasheet (12 pp, sha256
138022e1fe9ca504, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# WD1035DH-8
**WILLSEMI Will Semicon** · DC-DC Converters · DFN-8-EP(2x2)
WD1035DH-8 from WILLSEMI Will Semicon, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Feedback pin connected to the feedback resistor for the adjustable version or to VOUT for the fixed-output version. |
| 2 | PG | output | Power-good open-drain output with an external pull-up resistor; it is high when FB is within 90% of nominal and low otherwise, and is specified to sink up to 1 mA. |
| 3 | IN | power_in | Input pin with an operating range of 2.7V to 5.5V that must be decoupled to GND with at least 10uF ceramic capacitance. |
| 4 | PGND | power_in | Power ground, which must be connected to the exposed pad and a large copper area for maximum power dissipation. |
| 5 | NC | unconnected | No internal connection. |
| 6 | LX | output | Inductor pin (switching node) connecting the internal power switches to the output inductor. |
| 7 | EN | input | Enable control that turns the regulator on when pulled high (VIH 1.4V min, VIL 0.4V max) and must not be left floating. |
| 8 | SGND | power_in | Signal ground for the control circuitry. |
| 9 | Exposed Pad | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WILLSEMI Will Semicon |
| Package | DFN-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operation Voltage Range | VIN | 2.7 | | 5.5 | V | | 4 |
| Feedback Reference | VREF | 0.588 | 0.6 | 0.612 | V | | 4 |
| EN Input LOW Voltage | VIL | | | 0.4 | V | | 4 |
| EN Input HIGH Voltage | VIH | 1.4 | | | V | | 4 |
| Input OVP shutdown (falling) | VOVP | 5.6 | | 6 | V | Falling | 4 |
| Power Supply | VCC | -0.3 | | 6.5 | V | | 3 |
| Others Pins | | -0.3 | | | V | | 3 |
| Storage Temperature Range | | -65 | | 150 | °C | | 3 |
| Power Supply | VCC | 2.7 | | 5.5 | V | | 3 |
| Junction temperature | TJ | -40 | | 125 | °C | | 3 |
| Ambient temperature | TA | -40 | | 85 | °C | | 3 |
| Junction Temperature | TJ | | | 150 | °C | | 3 |
| Lead Temperature (Soldering,10 sec) | | | | 260 | °C | 10 sec soldering | 3 |
| Power Dissipation | PD | | | 2.19 | W | TA =25℃, DFN2X2-8L | 3 |
| ESD HBM | | | | 2000 | V | | 3 |
| ESD CDM | | | | 2000 | V | | 3 |
| Undervoltage Lockout rising | VUVLO-H | | 2.45 | | V | VIN Rising | 4 |
| Undervoltage Lockout falling | VUVLO-L | | 2.25 | | V | VIN Falling | 4 |
| Quiescent Current | IQ | | 45 | | uA | Switching | 4 |
| Shutdown Current | ISD | | 1 | | μA | VEN =GND, VIN =3.6V | 4 |
| Line Regulation | ΔVOUT /ΔVIN | | 0.35 | | %/V | | 4 |
| PFET Rdson | Rdson P | | 100 | | mΩ | | 4 |
| NFET Rdson | Rdson N | | 60 | | mΩ | | 4 |
| PFET Current Limit | ILIMT | | 4.5 | | A | | 4 |
| Oscillator Frequency | FOSC | | 1.5 | | MHz | | 4 |
| Max Duty Cycle | | | 100 | | % | | 4 |
| Soft Start Time | | | 800 | | uS | | 4 |
| Power on delay time | | | 25 | | uS | | 4 |
| Input OVP shutdown (rising) | VOVP | | 6.3 | | V | Rising | 4 |
| Over Voltage Protection Blanking Time | | | 20 | | uS | | 4 |
| Thermal Shutdown | | | 150 | | °C | | 4 |
| Thermal Shutdown Hysteresis | | | 30 | | °C | | 4 |
| Package Thermal Resistance Junction-to-Ambient | TJA | | 50 | | °C /W | | 3 |
| Package Thermal Resistance Junction-to-Case | TJC | | 8 | | °C /W | | 3 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | 3) The PCB copper area associated with SW pin | 10 |
## CAD (KiCad official)
- Symbol: `WD1035DH-8`
- Footprint: `Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm`
- 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `wd1035dh-8-etched.step` / `wd1035dh-8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `wd1035dh-8.step` / `wd1035dh-8.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [WILLSEMI Will Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588954847898963968) (12 pp, sha256 `138022e1fe9ca504`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/wd1035dh-8-datasheet.pdf)