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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs w25x40clsnig: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 10d ago
README.md w25x40clsnig: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 14d ago
w25x40clsnig-etched.fit.json w25x40clsnig: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
w25x40clsnig-etched.glb w25x40clsnig: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
w25x40clsnig-etched.step w25x40clsnig: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
w25x40clsnig.glb Publish 0.1.0 · Ray 1mo ago
w25x40clsnig.kicad_mod Publish 0.1.0 · Ray 1mo ago
w25x40clsnig.kicad_sym Publish 0.1.0 · Ray 1mo ago
w25x40clsnig.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
w25x40clsnig.step Publish 0.1.0 · Ray 1mo ago

W25X40CLSNIG

Winbond Elec · NOR FLASH · SOIC-8-150mil

W25X40CLSNIG from Winbond Elec, in a SOIC-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input SPI Chip Select input, active low. When /CS is high the device is deselected and DO / IO0 / IO1 are at high impedance; when driven low the device is selected and instructions can be issued. Must track VCC at power-up; a pull-up resistor to VCC is recommended.
2 DO (IO1) bidirectional Data output in Standard SPI mode (unidirectional, driven on falling edge of CLK). In Dual SPI mode this pin becomes bidirectional IO1 for the Fast Read Dual Output (3Bh) and Fast Read Dual I/O (BBh) instructions.
3 /WP input Write Protect input, active low. Used in conjunction with the Status Register SRP, TB and BP2/BP1/BP0 bits to hardware-protect a portion or the entire memory array from Status Register writes.
4 GND power_in Ground reference for the device.
5 DI (IO0) bidirectional Data input in Standard SPI mode (unidirectional, latched on rising edge of CLK) used to send instructions, addresses and data. In Dual SPI mode this pin becomes bidirectional IO0.
6 CLK input SPI Serial Clock input; provides the timing reference for all serial input and output operations. Supports SPI Modes 0 and 3 up to 104MHz.
7 /HOLD input Hold input, active low. When /HOLD is asserted low while /CS is low the DO pin goes to high impedance and signals on DI and CLK are ignored, pausing the device without losing state; useful when the SPI bus is shared with other devices.
8 VCC power_in Power supply input. Single-supply operation from 2.3V to 3.6V; typical active current ~1mA and power-down current <1uA.

Key specifications

Parameter Value
Manufacturer Winbond Elec
Package SOIC-8-150mil
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • W25X40CLSNIG
  • W25X40CLSNIGSNJG
  • W25X40CLSNIGSSIG
  • W25X40CLSNIGSSJG
  • W25X40CLSNIGSVIG
  • W25X40CLSNIGSVJG
  • W25X40CLSNIGZPIG
  • W25X40CLSNIGZPJG
  • W25X40CLSNIGUXIG
  • W25X40CLSNIGUXJG
  • W25X40CLSNIGDAIG
  • W25X40CLSNIGDAJG

CAD (KiCad official)

  • Symbol: W25X40CLSNIG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-150mil (KiCad packages3D, STEP)
  • 3D model files: w25x40clsnig-etched.step / w25x40clsnig-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); w25x40clsnig.step / w25x40clsnig.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
w25x40clsnig.step 122 KB You want the bare part, or you mark your own boards.
w25x40clsnig-etched.step 2.3 MB You want the part with W25X40CLSNIG already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 576 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winbond Elec datasheet (53 pp, sha256 815a536a29f475d0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF