component
W25Q80DVSSIG
Public Made by Adomby adom
Winbond Elec NOR FLASH, SOIC-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
w25q80dvssig: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
a77edd2
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{
"schema_version": 1,
"type": "component",
"slug": "w25q80dvssig",
"title": "W25Q80DVSSIG",
"brief": "Winbond Elec NOR FLASH, SOIC-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"memory",
"w25q80dvssig"
],
"component": {
"mpn": "W25Q80DVSSIG",
"manufacturer": "Winbond Elec",
"package": "SOIC-8-208mil",
"pin_count": 8,
"category": "Memory",
"subcategory": "NOR FLASH",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/80d59756ca2c423292949560b68dc23a.pdf",
"parts": {
"symbol": "w25q80dvssig.kicad_sym",
"footprint": "w25q80dvssig.kicad_mod",
"model_3d": "w25q80dvssig-etched.glb",
"model_3d_plain": "w25q80dvssig.glb",
"model_3d_step": "w25q80dvssig-etched.step",
"model_3d_step_plain": "w25q80dvssig.step",
"lbr": "w25q80dvssig.lbr"
},
"distributor_links": {
"lcsc": "C98163"
},
"pins": [
{
"number": "1",
"name": "/CS",
"type": "input",
"description": "SPI Chip Select input, active low. When high the device is deselected and DO/IO pins are high-impedance; when low the device is enabled. A pull-up resistor to VCC is recommended to guarantee deselect at power-up."
},
{
"number": "2",
"name": "DO (IO1)",
"type": "bidirectional",
"description": "Serial Data Output in Standard SPI mode (data shifted out on the falling edge of CLK). In Dual/Quad SPI modes this pin becomes bidirectional IO1."
},
{
"number": "3",
"name": "/WP (IO2)",
"type": "bidirectional",
"description": "Hardware Write Protect input, active low, used with the Status Register Block Protect and SRP bits to write-protect all or a portion of the array. When the Quad Enable (QE) bit is set the pin is repurposed as bidirectional IO2 for Quad SPI."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "5",
"name": "DI (IO0)",
"type": "bidirectional",
"description": "Serial Data Input in Standard SPI mode (data shifted in on the rising edge of CLK). In Dual/Quad SPI modes this pin becomes bidirectional IO0."
},
{
"number": "6",
"name": "CLK",
"type": "input",
"description": "SPI serial clock input. Provides timing for serial input on the rising edge and serial output on the falling edge. Supports clock rates up to 104MHz."
},
{
"number": "7",
"name": "/HOLD (IO3)",
"type": "bidirectional",
"description": "Hold input, active low. When /HOLD is asserted while /CS is low, DO goes high-impedance and DI/CLK are ignored so the device can be paused while selected. When Quad Enable (QE) is set the pin is repurposed as bidirectional IO3 for Quad SPI."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Power supply input, 2.7V to 3.6V. Recommended to decouple with a bulk and a ceramic bypass capacitor close to the pin."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/80d59756ca2c423292949560b68dc23a.pdf",
"pages": 71,
"sha256": "bd7e65b1335bb21d",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "w25q80dvssig.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "w25q80dvssig-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "db2c2fae5ce8af9ba1ce4573738b113371ca271f6813ba22f73e8e6a73328a0a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Winbond Elec",
"Package": "SOIC-8-208mil",
"Category": "Memory",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"w25q80dvssig"
],
"discovery_pitch": "W25Q80DVSSIG (Winbond Elec) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"w25q80dvssig.kicad_sym",
"w25q80dvssig.kicad_mod",
"w25q80dvssig.glb",
"w25q80dvssig.step",
"w25q80dvssig-etched.step",
"w25q80dvssig.lbr",
"docs/hero.png",
"docs/w25q80dvssig-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "W25Q80DVSSIG",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGSSIQ",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGSNIG",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGSNIQ",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGSVIG",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGSVIQ",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGZPIG",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGZPIQ",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGUXIE",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGDAIG",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSSIGBYIT",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T14:03:18.804Z"
}