component
W25Q80DVSNIG TR
Public Made by Adomby adom
Winbond NOR FLASH, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
ebbf86c
10d ago
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{
"schema_version": 1,
"type": "component",
"slug": "w25q80dvsnig-tr",
"title": "W25Q80DVSNIG TR",
"brief": "Winbond NOR FLASH, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"memory",
"w25q80dvsnig tr"
],
"component": {
"mpn": "W25Q80DVSNIG TR",
"manufacturer": "Winbond",
"package": "SOIC-8",
"pin_count": 8,
"category": "Memory",
"subcategory": "NOR FLASH",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d21745bc7c3361bb8c458f876ea32a95.pdf",
"parts": {
"symbol": "w25q80dvsnig-tr.kicad_sym",
"footprint": "w25q80dvsnig-tr.kicad_mod",
"model_3d": "w25q80dvsnig-tr-etched.glb",
"model_3d_plain": "w25q80dvsnig-tr.glb",
"model_3d_step": "w25q80dvsnig-tr-etched.step",
"model_3d_step_plain": "w25q80dvsnig-tr.step",
"lbr": "w25q80dvsnig-tr.lbr"
},
"distributor_links": {
"lcsc": "C401655"
},
"pins": [
{
"number": "1",
"name": "/CS",
"type": "input",
"description": "Active-low SPI Chip Select input. Drive low to enable device access; when high the device is deselected and DO/IO pins are high-Z. /CS must track VCC at power-up (per power-up timing)."
},
{
"number": "2",
"name": "DO/IO1",
"type": "bidirectional",
"description": "Standard SPI serial data output (DO); in Dual/Quad SPI modes acts as bidirectional IO1. In Standard/Dual SPI this pin is DO; when QE=1 in Status Register-2 it becomes IO1 for Quad SPI."
},
{
"number": "3",
"name": "/WP/IO2",
"type": "bidirectional",
"description": "Active-low hardware Write Protect input in Standard/Dual SPI, used with the Status Register Block Protect (CMP/SEC/TB/BP2/BP1/BP0) and SRP0 bits. Becomes bidirectional IO2 for Quad SPI when the Quad Enable (QE) bit is set."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Device ground reference for all logic and I/O signaling."
},
{
"number": "5",
"name": "DI/IO0",
"type": "bidirectional",
"description": "Standard SPI serial data input (DI); latched on rising edge of CLK. In Dual/Quad SPI acts as bidirectional IO0 for command, address, and data phases."
},
{
"number": "6",
"name": "CLK",
"type": "input",
"description": "SPI Serial Clock input, up to 104 MHz. Provides timing for serial input/output; data on DI/IOx is latched on rising edge, data on DO/IOx is shifted out on falling edge."
},
{
"number": "7",
"name": "/HOLD/IO3",
"type": "bidirectional",
"description": "Active-low Hold input in Standard/Dual SPI: while /CS is low, driving /HOLD low pauses the device with DO high-Z and DI/CLK ignored. Becomes bidirectional IO3 for Quad SPI when the Quad Enable (QE) bit in Status Register-2 is set."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Main power supply, 2.7V to 3.6V single-supply. Decouple with a local bypass capacitor to GND."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/d21745bc7c3361bb8c458f876ea32a95.pdf",
"pages": 71,
"sha256": "3300ea3e9d2cda4e",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
}
},
"metadata": {
"specs": {
"Manufacturer": "Winbond",
"Package": "SOIC-8",
"Category": "Memory",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"w25q80dvsnig tr"
],
"discovery_pitch": "W25Q80DVSNIG TR (Winbond) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"w25q80dvsnig-tr.kicad_sym",
"w25q80dvsnig-tr.kicad_mod",
"w25q80dvsnig-tr.glb",
"w25q80dvsnig-tr.step",
"w25q80dvsnig-tr.lbr",
"docs/hero.png",
"docs/w25q80dvsnig-tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"w25q80dvsnig-tr-etched.step"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "W25Q80DVSNIG TR",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSNIG TRSS",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSNIG TRSV",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSNIG TRZP",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSNIG TRUX",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSNIG TRUXIE",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSNIG TRDA",
"kind": "packaging"
},
{
"mpn": "W25Q80DVSNIG TRBY",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T14:03:10.565Z"
}