component
W25Q80DVSNIG TR
Public Made by Adomby adom
Winbond NOR FLASH, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
b5437ad
1mo ago
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{
"schema": "adom.pads/1",
"slug": "w25q80dvsnig-tr",
"footprint": "SOIC-8_3.9x4.9mm_P1.27mm",
"generated_from": {
"footprint": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4"
},
"pad_count": 8,
"symbol_pins": [
"1",
"2",
"3",
"4",
"5",
"6",
"7",
"8"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "/CS",
"type": "input",
"description": "Active-low SPI Chip Select input. Drive low to enable device access; when high the device is deselected and DO/IO pins are high-Z. /CS must track VCC at power-up (per power-up timing).",
"is_pin1": true,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "DO/IO1",
"type": "bidirectional",
"description": "Standard SPI serial data output (DO); in Dual/Quad SPI modes acts as bidirectional IO1. In Standard/Dual SPI this pin is DO; when QE=1 in Status Register-2 it becomes IO1 for Quad SPI.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "/WP/IO2",
"type": "bidirectional",
"description": "Active-low hardware Write Protect input in Standard/Dual SPI, used with the Status Register Block Protect (CMP/SEC/TB/BP2/BP1/BP0) and SRP0 bits. Becomes bidirectional IO2 for Quad SPI when the Quad Enable (QE) bit is set.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "GND",
"type": "power_in",
"description": "Device ground reference for all logic and I/O signaling.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "DI/IO0",
"type": "bidirectional",
"description": "Standard SPI serial data input (DI); latched on rising edge of CLK. In Dual/Quad SPI acts as bidirectional IO0 for command, address, and data phases.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "CLK",
"type": "input",
"description": "SPI Serial Clock input, up to 104 MHz. Provides timing for serial input/output; data on DI/IOx is latched on rising edge, data on DO/IOx is shifted out on falling edge.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "/HOLD/IO3",
"type": "bidirectional",
"description": "Active-low Hold input in Standard/Dual SPI: while /CS is low, driving /HOLD low pauses the device with DO high-Z and DI/CLK ignored. Becomes bidirectional IO3 for Quad SPI when the Quad Enable (QE) bit in Status Register-2 is set.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "VCC",
"type": "power_in",
"description": "Main power supply, 2.7V to 3.6V single-supply. Decouple with a local bypass capacitor to GND.",
"is_pin1": false,
"source": {
"geometry": "SOIC-8_3.9x4.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}