W25Q32JVSSIQ

{
  "schema_version": 1,
  "type": "component",
  "slug": "w25q32jvssiq",
  "title": "W25Q32JVSSIQ",
  "brief": "Winbond Elec NOR FLASH, SOIC-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "memory",
    "w25q32jvssiq"
  ],
  "component": {
    "mpn": "W25Q32JVSSIQ",
    "manufacturer": "Winbond Elec",
    "package": "SOIC-8-208mil",
    "pin_count": 8,
    "category": "Memory",
    "subcategory": "NOR FLASH",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/5e9d1528bd9ff612cdac1a3e34dc8d43.pdf",
    "parts": {
      "symbol": "w25q32jvssiq.kicad_sym",
      "footprint": "w25q32jvssiq.kicad_mod",
      "model_3d": "w25q32jvssiq-etched.glb",
      "model_3d_plain": "w25q32jvssiq.glb",
      "model_3d_step": "w25q32jvssiq-etched.step",
      "model_3d_step_plain": "w25q32jvssiq.step",
      "lbr": "w25q32jvssiq.lbr"
    },
    "distributor_links": {
      "lcsc": "C179173"
    },
    "pins": [
      {
        "number": "1",
        "name": "/CS",
        "type": "input",
        "description": "SPI Chip Select input, active low. Drive low to select the device and clock instructions/data on DI/DO or IO0-IO3; drive high to deselect and place I/O pins in high impedance. Requires a valid high-to-low transition after power-up before any instruction is accepted; a pull-up to VCC is recommended."
      },
      {
        "number": "2",
        "name": "DO/IO1",
        "type": "bidirectional",
        "description": "Standard/Dual SPI serial data output (DO) driven on the falling edge of CLK. In Quad SPI mode (Quad Enable QE=1) this pin becomes bidirectional IO1 for both write and read transfers."
      },
      {
        "number": "3",
        "name": "/WP/IO2",
        "type": "bidirectional",
        "description": "Active-low Write Protect input in standard/Dual SPI mode; when asserted together with the SRP/BP/TB/SEC/CMP bits it hardware-protects part or all of the array and the Status Register. In Quad SPI mode (QE=1) this pin becomes bidirectional IO2."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground reference. Connect to the system 0 V/GND plane."
      },
      {
        "number": "5",
        "name": "DI/IO0",
        "type": "bidirectional",
        "description": "Standard/Dual SPI serial data input (DI), sampled on the rising edge of CLK for instructions, addresses and data. In Quad SPI mode this pin becomes bidirectional IO0."
      },
      {
        "number": "6",
        "name": "CLK",
        "type": "input",
        "description": "SPI serial clock input. Provides the timing reference for all serial input and output operations; supports up to 133 MHz. Data on DI/IOx is latched on the rising edge; DO/IOx is updated on the falling edge."
      },
      {
        "number": "7",
        "name": "/HOLD/IO3",
        "type": "bidirectional",
        "description": "Active-low /HOLD input in standard/Dual SPI mode: while /CS is low, driving /HOLD low pauses the device (DO goes high-Z, DI/CLK are ignored) without deselecting it. In Quad SPI mode (QE=1) the pin is repurposed as bidirectional IO3. Note: on this 8-pin package the pin does NOT provide the dedicated hardware /RESET function (only SOIC-16 and TFBGA packages expose /RESET)."
      },
      {
        "number": "8",
        "name": "VCC",
        "type": "power_in",
        "description": "Core and I/O supply, 2.7 V to 3.6 V. Decouple with a local ceramic bypass capacitor close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/5e9d1528bd9ff612cdac1a3e34dc8d43.pdf",
        "pages": 80,
        "sha256": "a835e8ae41ea71e9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -1.905
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
      "mark": "drawn"
    },
    "models_3d": [
      {
        "file": "w25q32jvssiq.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "w25q32jvssiq-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07cefe449a1f9eec1a1e9cd1ee1e0fbd8107412ba741a3daa6e6085d705f83a9",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Winbond Elec",
      "Package": "SOIC-8-208mil",
      "Category": "Memory",
      "Pins": "8"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "w25q32jvssiq"
  ],
  "discovery_pitch": "W25Q32JVSSIQ (Winbond Elec) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "w25q32jvssiq.kicad_sym",
    "w25q32jvssiq.kicad_mod",
    "w25q32jvssiq.glb",
    "w25q32jvssiq.step",
    "w25q32jvssiq-etched.step",
    "w25q32jvssiq.lbr",
    "docs/hero.png",
    "docs/w25q32jvssiq-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "W25Q32JVSSIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQSSIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQSNIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQSNIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQSTIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQSTIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQZPIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQZPIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQZEIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQZEIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQXGIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQXGIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQSFIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQSFIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQDAIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQDAIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQTBIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQTBIG",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQTCIQ",
      "kind": "packaging"
    },
    {
      "mpn": "W25Q32JVSSIQTCIG",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T14:01:39.828Z"
}