component
W25Q256JWFIQ TR
Public Made by Adomby adom
Winbond Elec NOR FLASH, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownW25Q256JWFIQ TR
Winbond Elec · NOR FLASH · SOIC-16
W25Q256JWFIQ TR from Winbond Elec, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | /HOLD or /RESET (IO3) | bidirectional | Hold or Reset input (Data Input Output 3) used as IO3 for Quad SPI; the /HOLD function is only available on Standard/Dual SPI part numbers with the IM ordering option, and /HOLD is disabled on the IQ variant. |
| 2 | VCC | power_in | Power supply, specified at a single 1.7V to 1.95V supply. |
| 3 | /RESET | input | Dedicated hardware reset input that, when driven low for a minimum of about 1µs, terminates operations and returns the device to its power-on state; if unused it can be left floating or connected to VCC. |
| 4 | N/C | unconnected | No connect. |
| 5 | N/C | unconnected | No connect. |
| 6 | N/C | unconnected | No connect. |
| 7 | /CS | input | Active-low chip select; when high the device is deselected and DO/IO pins are high impedance, and /CS must track VCC at power-up and power-down. |
| 8 | DO (IO1) | bidirectional | Data output (Data Input Output 1), driven on the falling edge of CLK in Standard SPI and used as the bidirectional IO1 in Dual and Quad SPI. |
| 9 | /WP (IO2) | bidirectional | Active-low Write Protect input that, with the status register protect bits, prevents Status Register writes, and becomes IO2 when QE=1. |
| 10 | GND | power_in | Ground reference. |
| 11 | N/C | unconnected | No connect. |
| 12 | N/C | unconnected | No connect. |
| 13 | N/C | unconnected | No connect. |
| 14 | N/C | unconnected | No connect. |
| 15 | DI (IO0) | bidirectional | Data input (Data Input Output 0) that writes instructions, addresses and data on the rising edge of CLK in Standard SPI and is the IO0 line in Dual and Quad SPI. |
| 16 | CLK | input | Serial clock input that provides the timing for serial input and output operations. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winbond Elec |
| Package | SOIC-16 |
| Category | Memory |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
W25Q256JWFIQ TR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
w25q256jwfiq-tr-etched.step/w25q256jwfiq-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);w25q256jwfiq-tr.step/w25q256jwfiq-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Winbond Elec datasheet (99 pp, sha256
9032c4063ead2036, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).