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Name Last commit message Last updated
docs w25q16jvssiq: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json w25q16jvssiq: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 23h ago
README.md w25q16jvssiq: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 16d ago
w25q16jvssiq-etched.fit.json w25q16jvssiq: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
w25q16jvssiq-etched.glb w25q16jvssiq: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
w25q16jvssiq-etched.step w25q16jvssiq: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
w25q16jvssiq.glb Publish 0.1.0 · Ray 1mo ago
w25q16jvssiq.kicad_mod Publish 0.1.0 · Ray 1mo ago
w25q16jvssiq.kicad_sym Publish 0.1.0 · Ray 1mo ago
w25q16jvssiq.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
w25q16jvssiq.step Publish 0.1.0 · Ray 1mo ago

W25Q16JVSSIQ

Winbond Elec · NOR FLASH · SOIC-8-208mil

W25Q16JVSSIQ from Winbond Elec, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input Active-low SPI Chip Select input. When /CS is high the device is deselected and DO/IOx pins go to high impedance and current drops to standby. When /CS is low the device is selected and accepts instructions on DI/IOx. /CS must track VCC at power-up/down; a pull-up resistor is recommended.
2 DO (IO1) bidirectional Standard/Dual SPI serial data output; in Quad SPI mode (QE=1) this becomes bidirectional I/O bit 1 (IO1). Data is shifted out on the falling edge of CLK in standard SPI, or bidirectional on CLK edges for Dual/Quad I/O instructions.
3 /WP (IO2) bidirectional Active-low hardware Write Protect input for the Status Register (used with CMP/SEC/TB/BP2:0/SRP bits). Becomes bidirectional IO2 for Quad SPI instructions when QE=1 in Status Register-2.
4 GND power_in Device ground (0 V) reference.
5 DI (IO0) bidirectional Standard/Dual SPI serial data input; becomes bidirectional I/O bit 0 (IO0) for Dual/Quad SPI instructions. In Standard SPI, instructions/addresses/data are shifted in on the rising edge of CLK.
6 CLK input Serial Clock input. Provides timing for all serial input and output operations. SPI Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1) are supported, up to 133 MHz.
7 /HOLD or /RESET (IO3) bidirectional Active-low /HOLD (pauses SPI transactions while /CS remains low) or optional /RESET function in Standard/Dual SPI. In Quad SPI mode (QE=1) this pin becomes bidirectional IO3 and the /HOLD/ /RESET function is not available.
8 VCC power_in Device power supply, 2.7 V to 3.6 V. Typical power-down current <1 uA. /CS input must track VCC during power-up and power-down.

Key specifications

Parameter Value
Manufacturer Winbond Elec
Package SOIC-8-208mil
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • W25Q16JVSSIQ
  • W25Q16JVSSIQSSIG
  • W25Q16JVSSIQSN
  • W25Q16JVSSIQSNIQ
  • W25Q16JVSSIQSNIG
  • W25Q16JVSSIQZP
  • W25Q16JVSSIQZPIQ
  • W25Q16JVSSIQZPIG
  • W25Q16JVSSIQUX
  • W25Q16JVSSIQUXIQ
  • W25Q16JVSSIQUXIG
  • W25Q16JVSSIQUU
  • W25Q16JVSSIQUUIQ
  • W25Q16JVSSIQUUIG
  • W25Q16JVSSIQXG
  • W25Q16JVSSIQXGIQ
  • W25Q16JVSSIQXGIG
  • W25Q16JVSSIQBY

CAD (KiCad official)

  • Symbol: W25Q16JVSSIQ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: w25q16jvssiq-etched.step / w25q16jvssiq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); w25q16jvssiq.step / w25q16jvssiq.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
w25q16jvssiq.step 122 KB You want the bare part, or you mark your own boards.
w25q16jvssiq-etched.step 2.6 MB You want the part with W25Q16JVSSIQ already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 616 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winbond Elec datasheet (75 pp, sha256 ebb56256faa02967, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF