component
W25Q16JVSNIM TR
Public Made by Adomby adom
Winbond Elec NOR FLASH, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "w25q16jvsnim-tr",
"version": "0.1.0",
"type": "component",
"description": "Winbond Elec NOR FLASH, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"memory",
"w25q16jvsnim tr",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"w25q16jvsnim-tr.kicad_sym",
"w25q16jvsnim-tr.kicad_mod",
"w25q16jvsnim-tr.glb",
"w25q16jvsnim-tr.step",
"w25q16jvsnim-tr.lbr",
"docs/hero.png",
"docs/w25q16jvsnim-tr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"w25q16jvsnim-tr-hero.glb",
"w25q16jvsnim-tr-hero.overlay.json",
"w25q16jvsnim-tr-etched.glb"
],
"component": {
"mpn": "W25Q16JVSNIM TR",
"manufacturer": "Winbond Elec",
"package": "SOIC-8",
"pin_count": 8,
"category": "Memory",
"subcategory": "NOR FLASH",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8601108893888503808",
"parts": {
"symbol": "w25q16jvsnim-tr.kicad_sym",
"footprint": "w25q16jvsnim-tr.kicad_mod",
"model_3d": "w25q16jvsnim-tr-hero.glb",
"model_3d_plain": "w25q16jvsnim-tr-etched.glb",
"model_3d_step": "w25q16jvsnim-tr-etched.step",
"model_3d_step_plain": "w25q16jvsnim-tr.step",
"lbr": "w25q16jvsnim-tr.lbr"
},
"distributor_links": {
"lcsc": "C6326900",
"digikey": "256-W25Q16JVSNIMTR-ND",
"mouser": "454-W25Q16JVSNIMTR"
},
"distributor_check": {
"checked_at": "2026-10-18T03:18:58Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "256-W25Q16JVSNIMTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "454-W25Q16JVSNIMTR",
"status": "found",
"lifecycle": "End of Life"
}
},
"pins": [
{
"number": "1",
"name": "/CS",
"type": "input",
"description": "Chip Select Input; when high the device is deselected and the DO/IO pins are high impedance, and /CS must track VCC at power-up and power-down."
},
{
"number": "2",
"name": "DO (IO1)",
"type": "bidirectional",
"description": "Data Output (Data Input Output 1); in standard SPI it outputs data on the falling edge of CLK, and it is IO1 for Dual/Quad SPI."
},
{
"number": "3",
"name": "/WP (IO2)",
"type": "bidirectional",
"description": "Write Protect Input (Data Input Output 2); active low, used with the Status Register protect bits to hardware-protect the Status Register, and it becomes IO2 when QE=1 (WP function not available in Quad mode)."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground."
},
{
"number": "5",
"name": "DI (IO0)",
"type": "bidirectional",
"description": "Data Input (Data Input Output 0); in standard SPI it latches instructions, addresses and data on the rising edge of CLK, and it is IO0 for Dual/Quad SPI."
},
{
"number": "6",
"name": "CLK",
"type": "input",
"description": "Serial Clock Input providing timing for serial input and output operations; clock frequencies up to 133MHz are supported."
},
{
"number": "7",
"name": "/HOLD or /RESET (IO3)",
"type": "bidirectional",
"description": "Hold or Reset Input (Data Input Output 3); active low /HOLD pauses the device when QE=0 and HOLD/RST=0 (factory default), it acts as /RESET when HOLD/RST=1, and it becomes IO3 when QE=1."
},
{
"number": "8",
"name": "VCC",
"type": "power_in",
"description": "Power Supply; single 2.7V to 3.6V supply."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin 7 is multi-function: /HOLD, /RESET or IO3 depending on the QE bit (Status Register-2) and HOLD/R; Pins 2, 3, 5 and 7 are labelled with both standard SPI and Quad/Dual IO names. Pin names above follo"
],
"pages_sent": 19,
"cost_usd": 0.0917,
"at": "2026-10-18T03:16:55"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8601108893888503808",
"pages": 99,
"sha256": "c5fef2a6b8052117",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "w25q16jvsnim-tr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "w25q16jvsnim-tr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "190b8f26e16217c383f3ae5bef9ef90c176d9917c05c0d00276c867abdc6dd00",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}