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W25Q128JWSIQ

Public Made by Adom

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Winbond Elec NOR FLASH, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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W25Q128JWSIQ

Winbond Elec · NOR FLASH · SOIC-8-208mil

W25Q128JWSIQ from Winbond Elec, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input Chip Select input; when high the device is deselected and the DO (IO1) and other data pins are at high impedance.
2 DO (IO1) bidirectional Data Output (Data Input Output 1) used for standard and dual SPI instructions, read on the falling edge of CLK.
3 /WP (IO2) bidirectional Active-low Write Protect input that protects the Status Register together with the BP, SEC, TB, CMP and SRP bits; it becomes IO2 when Quad SPI is enabled.
4 GND power_in Ground reference for the device.
5 DI (IO0) bidirectional Data Input (Data Input Output 0) used for standard SPI, written on the rising edge of CLK; also used as IO0 for dual and quad SPI.
6 CLK input Serial Clock input that provides the timing for serial input and output operations.
7 /HOLD or /RESET (IO3) bidirectional Active-low Hold input that pauses device operation while /CS is low, with DO at high impedance and DI/CLK ignored; it becomes IO3 when Quad SPI is enabled, and the /HOLD function is only available for standard/dual SPI.
8 VCC power_in Power supply pin for the single W25Q128JW supply.

Key specifications

Parameter Value
Manufacturer Winbond Elec
Package SOIC-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC VCC 1.7 1.95 V FR = 133MHz, fR = 50MHz(<85℃) 60
Ambient Temperature, Operating (Industrial) TA -40 85 °C Industrial grade 60
Supply Voltage (absolute max) VCC -0.6 2.5 V 59
Voltage Applied to Any Pin (min; max printed as VCC+0.4) VIO -0.6 V Relative to Ground 59
Transient Voltage on any Pin (min; max printed as VCC+2.0V) VIOT -2 V <20nS Transient, relative to Ground 59
Storage Temperature TSTG -65 150 °C 59
Electrostatic Discharge Voltage VESD -2000 2000 V Human Body Model 59
VCC (min) to /CS Low tVSL 20 µs 61
Time Delay Before Write Instruction tPUW 5 ms 61
Write Inhibit Threshold Voltage VWI 1 1.4 V 61
Minimum duration for ensuring initialization tPWD 100 µs 61
VCC voltage needed to drop below for ensuring initialization VPWD 0.8 V 61
Input Capacitance CIN 6 pF VIN = 0V 63
Output Capacitance COUT 8 pF VOUT = 0V 63
Input Leakage ILI -2 2 µA 63
I/O Leakage ILO -2 2 µA 63
Standby Current ICC1 10 50 µA /CS = VCC, VIN = GND or VCC (85℃) 63
Power-down Current ICC2 1 10 µA /CS = VCC, VIN = GND or VCC (85℃) 63
Current Read Data / Dual / Quad 1MHz ICC3 1 3 mA C = 0.1 VCC / 0.9 VCC, DO = Open 63
Current Read Data / Dual / Quad 50MHz ICC3 15 mA C = 0.1 VCC / 0.9 VCC, DO = Open 63
Current Read Data / Dual / Quad 80MHz ICC3 18 mA C = 0.1 VCC / 0.9 VCC, DO = Open 63
Current Dual Output Read / Quad Output Read 104MHz ICC3 20 mA C = 0.1 VCC / 0.9 VCC, DO = Open 63
Current Write Status Register ICC4 15 20 mA /CS = VCC 63
Current Page Program ICC5 15 20 mA /CS = VCC 63
Current Sector/Block Erase ICC6 15 20 mA /CS = VCC 63
Current Chip Erase ICC7 15 20 mA /CS = VCC 63
Input Low Voltage (min; max printed as VCC x 0.3) VIL -0.5 V 63
Output Low Voltage VOL 0.2 V IOL = 100 µA 63
Load Capacitance CL 30 pF 64
Input Rise and Fall Times TR, TF 5 ns 64
Clock frequency for SPI EBh instruction FR 133 MHz (< 85℃) 65
Clock frequency for all other SPI instructions except Read Data (03h) FR 104 MHz 65
Clock frequency for Read Data instruction (03h) fR 50 MHz 65
Clock Rise Time peak to peak tCLCH 0.1 V/ns 65
Clock Fall Time peak to peak tCHCL 0.1 V/ns 65
/CS Active Setup Time relative to CLK tSLCH 5 ns 65
/CS Not Active Hold Time relative to CLK tCHSL 5 ns 65
Data In Setup Time tDVCH 2 ns 65
Data In Hold Time tCHDX 3 ns 65
/CS Active Hold Time relative to CLK tCHSH 3 ns 65
/CS Not Active Setup Time relative to CLK tSHCH 3 ns 65
/CS Deselect Time (Array Read) tSHSL1 10 ns Array Read 65
/CS Deselect Time (Erase or Program to Read Status Registers) tSHSL2 50 ns Erase or Program to Read Status Registers 65
Volatile Status Register Write Time tSHSL2 50 ns Volatile Status Register Write 65
Output Disable Time tSHQZ 7 ns 65
Clock Low to Output Valid tCLQV 6 ns 65
Output Hold Time tCLQX 1.5 ns 65
Write Protect Setup Time Before /CS Low tWHSL 20 ns 66
Write Protect Hold Time After /CS High tSHWL 100 ns 66
/CS High to Power-down Mode tDP 3 µs 66
/CS High to Standby Mode without ID Read tRES1 30 µs 66
/CS High to next Instruction after Suspend tSUS 20 µs 66
/CS High to next Instruction after Reset tRST 30 µs 66
/RESET pin Low period to reset the device tRESET 1 µs 66
Write Status Register Time tW 1 15 ms 66
Page Program Time tPP 0.8 3 ms 66
Sector Erase Time (4KB) tSE 45 400 ms 66
Block Erase Time (32KB) tBE1 120 1600 ms 66
Block Erase Time (64KB) tBE2 150 2000 ms 66
Chip Erase Time tCE 40 200 s 66

CAD (KiCad official)

  • Symbol: W25Q128JWSIQ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: w25q128jwsiq-etched.step / w25q128jwsiq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); w25q128jwsiq.step / w25q128jwsiq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winbond Elec datasheet (78 pp, sha256 f83b49e22e8a4455, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF