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W25Q128JVSIM TR

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WINBOND ELECTRONICS Global Sourcing Parts, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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W25Q128JVSIM TR

WINBOND ELECTRONICS · Global Sourcing Parts · SOIC-8-208mil

W25Q128JVSIM TR from WINBOND ELECTRONICS, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input Chip Select Input; when high the device is deselected and the DO (IO1) and other serial data pins are at high impedance, and /CS must track the VCC supply level at power-up and power-down.
2 DO (IO1) bidirectional Data Output (Data Input Output 1), used for standard SPI data output and as IO1 for Dual SPI instructions.
3 /WP (IO2) bidirectional Write Protect Input (Data Input Output 2); active low, and used as IO2 for Quad SPI instructions when the QE bit is set.
4 GND power_in Ground.
5 DI (IO0) bidirectional Data Input (Data Input Output 0), used for standard SPI data input and as IO0 for Dual and Quad SPI instructions.
6 CLK input Serial Clock Input that provides the timing for serial input and output operations.
7 /HOLD or /RESET (IO3) bidirectional Hold or Reset Input (Data Input Output 3); /HOLD is active low and pauses the device while selected, and it is only available for Standard/Dual SPI, becoming IO3 for Quad SPI.
8 VCC power_in Power Supply input; the device operates from a single 2.7V to 3.6V supply.

Key specifications

Parameter Value
Manufacturer WINBOND ELECTRONICS
Package SOIC-8-208mil
Category Global Sourcing Parts
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC -0.6 4.6 V 61
Voltage Applied to Any Pin VIO -0.6 V Relative to Ground; printed max is VCC+0.4 61
Transient Voltage on any Pin VIOT -2 V <20nS Transient, Relative to Ground; printed max is VCC+2.0 61
Storage Temperature TSTG -65 150 °C 61
Electrostatic Discharge Voltage VESD -2000 2000 V Human Body Model 61
Supply Voltage VCC 3 3.6 V FR = 133MHz, fR = 50MHz 61
Supply Voltage VCC 2.7 3 V FR = 104MHz, fR = 50MHz 61
Ambient Temperature, Operating (Industrial) TA -40 85 °C Industrial 61
Write Inhibit Threshold Voltage VWI 1 2 V 62
VCC (min) to /CS Low tVSL 20 µs 62
Time Delay Before Write Instruction tPUW 5 ms 62
Input Capacitance CIN 6 pF VIN = 0V 63
Output Capacitance COUT 8 pF VOUT = 0V 63
Input Leakage ILI -2 2 µA 63
I/O Leakage ILO -2 2 µA 63
Standby Current ICC1 10 60 µA /CS = VCC, VIN = GND or VCC 63
Power-down Current ICC2 1 20 µA /CS = VCC, VIN = GND or VCC 63
Current Read Data / Dual / Quad 50MHz ICC3 8 15 mA C = 0.1 VCC / 0.9 VCC, DO = Open, Checker Board Pattern 63
Current Read Data / Dual / Quad 80MHz ICC3 10 18 mA C = 0.1 VCC / 0.9 VCC, DO = Open, Checker Board Pattern 63
Current Read Data / Dual / Quad 104MHz ICC3 12 20 mA C = 0.1 VCC / 0.9 VCC, DO = Open, Checker Board Pattern 63
Current Write Status Register ICC4 20 25 mA /CS = VCC 63
Current Page Program ICC5 20 25 mA /CS = VCC 63
Current Sector/Block Erase ICC6 20 25 mA /CS = VCC 63
Current Chip Erase ICC7 20 25 mA /CS = VCC 63
Input Low Voltage VIL -0.5 V printed max is VCC x 0.3 63
Output Low Voltage VOL 0.2 V IOL = 100 µA 63
Clock frequency except for Read Data (03h) instructions (3.0V-3.6V) FR 133 MHz 3.0V-3.6V 65
Clock frequency except for Read Data (03h) instructions (2.7V-3.0V) FR 104 MHz 2.7V-3.0V 65
Clock frequency for Read Data instruction (03h) fR 50 MHz Read Data (03h) instruction 65
/CS Active Setup Time relative to CLK tSLCH 3 ns 65
/CS Not Active Hold Time relative to CLK tCHSL 3 ns 65
Data In Setup Time tDVCH 1 ns 65
Data In Hold Time tCHDX 2 ns 65
/CS Active Hold Time relative to CLK tCHSH 3 ns 65
/CS Not Active Setup Time relative to CLK tSHCH 3 ns 65
/CS Deselect Time (for Read) tSHSL1 10 ns 65
/CS Deselect Time (for Erase or Program or Write) tSHSL2 50 ns 65
Output Disable Time tSHQZ 7 ns 65
Clock Low to Output Valid tCLQV 6 ns 65
Output Hold Time tCLQX 1.5 ns 65
Clock Rise Time peak to peak tCLCH 0.1 V/ns 65
Clock Fall Time peak to peak tCHCL 0.1 V/ns 65
Write Protect Setup Time Before /CS Low tWHSL 20 ns 66
Write Protect Hold Time After /CS High tSHWL 100 ns 66
/CS High to Power-down Mode tDP 3 µs 66
/CS High to Standby Mode without ID Read tRES1 3 µs 66
/CS High to Standby Mode with ID Read tRES2 1.8 µs 66
/CS High to next Instruction after Suspend tSUS 20 µs 66
/CS High to next Instruction after Reset tRST 30 µs 66
/RESET pin Low period to reset the device tRESET 1 µs 66
Write Status Register Time tW 10 15 ms 66
Page Program Time tPP 0.4 3 ms 66
Sector Erase Time (4KB) tSE 45 400 ms 66
Block Erase Time (32KB) tBE1 120 1600 ms 66
Block Erase Time (64KB) tBE2 150 2000 ms 66
Chip Erase Time tCE 40 200 s 66

CAD (KiCad official)

  • Symbol: W25Q128JVSIM TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: w25q128jvsim-tr-etched.step / w25q128jvsim-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); w25q128jvsim-tr.step / w25q128jvsim-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: WINBOND ELECTRONICS datasheet (78 pp, sha256 5e2f6a77e0225a5c, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF