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Contents

README

markdown

W25N01GWZEIG TR

Winbond Elec · NAND FLASH · WSON-8(6x8)

W25N01GWZEIG TR from Winbond Elec, in a WSON-8(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 /CS input Chip Select Input; when high the device is deselected and the DO/IO pins are high impedance, and /CS must track the VCC supply level at power-up and power-down.
2 DO (IO1) bidirectional Data Output (Data Input Output 1) used for Standard and Dual SPI instructions, with data read on the falling edge of CLK.
3 /WP (IO2) bidirectional Write Protect Input (Data Input Output 2) that acts as IO2 for Quad SPI and as an active-low write protect input when WP-E=1, where /WP tied to GND disables all write, program and erase functions.
4 GND power_in Ground.
5 DI (IO0) bidirectional Data Input (Data Input Output 0) used for Standard and Dual SPI instructions, with instructions, addresses and data written on the rising edge of CLK.
6 CLK input Serial Clock Input that provides the timing for serial input and output operations.
7 /HOLD (IO3) bidirectional Hold Input (Data Input Output 3) that pauses Standard/Dual SPI operation when driven low while /CS is low and must be driven high or pulled up so it does not float.
8 VCC power_in Power Supply pin; the device operates on a single 1.70V to 1.95V supply.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Winbond Elec
Package WSON-8(6x8)
Category Memory
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (absolute maximum) VCC -0.6 2.5 V 56
Voltage Applied to Any Pin VIO -0.6 V Relative to Ground; printed upper limit is VCC+0.4 56
Transient Voltage on any Pin VIOT -2 V <20nS Transient, Relative to Ground; printed upper limit is VCC+2.0 56
Storage Temperature TSTG -65 150 °C 56
Electrostatic Discharge Voltage VESD -2000 2000 V Human Body Model 56
Supply Voltage (operating range) VCC 1.7 1.95 V 56
Ambient Temperature, Operating TA -40 85 °C Industrial 56
VCC (min) to /CS Low tVSL 1 ms Characterized only 57
Time Delay Before Write Instruction tPUW 5 ms Characterized only 57
Write Inhibit Threshold Voltage VWI 1 1.4 V Characterized only 57
Input Capacitance CIN 6 pF VIN = 0V; tested on sample basis 58
Output Capacitance Cout 8 pF VOUT = 0V; tested on sample basis 58
Input Leakage ILI -2 2 µA 58
I/O Leakage ILO -2 2 µA 58
Standby Current ICC1 10 50 µA /CS = VCC, VIN = GND or VCC 58
Read Current ICC2 25 35 mA C = 0.1 VCC / 0.9 VCC, DO = Open 58
Current Page Program ICC3 25 35 mA /CS = VCC 58
Current Block Erase ICC4 25 35 mA /CS = VCC 58
Output Low Voltage VOL 0.2 V IOL = 100 µA 58
Clock frequency for all instructions except Continuous Read Mode FR 104 MHz 60
Clock frequency for Continuous Read Mode FR 83 MHz Continuous Read Mode 60
Clock High, Low Time tCLH, tCLL 4 ns For all instructions; clock high + clock low must be <= 1/fC 60
Clock Rise Time peak to peak tCLCH 0.1 V/ns Value guaranteed by design and/or characterization 60
Clock Fall Time peak to peak tCHCL 0.1 V/ns Value guaranteed by design and/or characterization 60
/CS Active Setup Time relative to CLK tSLCH 6 ns 60
/CS Not Active Hold Time relative to CLK tCHSL 5 ns 60
Data In Setup Time tDVCH 3 ns 60
Data In Hold Time tCHDX 4 ns 60
/CS Active Hold Time relative to CLK tCHSH 3 ns 60
/CS Not Active Setup Time relative to CLK tSHCH 3 ns 60
/CS Deselect Time (Array Read to Array Read) tSHSL1 10 ns Array Read to Array Read 60
/CS Deselect Time (Erase, Program or Read Status Registers to Read Status Registers) tSHSL2 50 ns Erase, Program or Read Status Registers to Read Status Registers 60
Output Disable Time tSHQZ 15 ns Value guaranteed by design and/or characterization 60
Clock Low to Output Valid tCLQV 8 ns 60
Output Hold Time tCLQX 2 ns 60
/HOLD Active Setup Time relative to CLK tHLCH 5 ns 60
/HOLD Active Hold Time relative to CLK tCHHH 5 ns 60
/HOLD Not Active Setup Time relative to CLK tHHCH 5 ns 61
/HOLD Not Active Hold Time relative to CLK tCHHL 5 ns 61
/HOLD to Output Low-Z tHHQX 7 ns Value guaranteed by design and/or characterization 61
/HOLD to Output High-Z tHLQZ 12 ns Value guaranteed by design and/or characterization 61
Write Protect Setup Time Before /CS Low tWHSL 20 ns 61
Write Protect Hold Time After /CS High tSHWL 100 ns 61
Status Register Write Time tW 50 ns 61
Read Page Data Time (ECC disabled) tRD1 25 µs ECC disabled 61
Read Page Data Time (ECC enabled) tRD2 60 µs ECC enabled 61
Page Program, OTP Lock, BBM Management Time tPP 250 700 us 61
Block Erase Time tBE 2 10 ms 61
Number of partial page programs NoP 4 times 61

CAD (KiCad official)

  • Symbol: W25N01GWZEIG TR
  • Footprint: Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm
  • 3D model: WSON-8(6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: w25n01gwzeig-tr-etched.step / w25n01gwzeig-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); w25n01gwzeig-tr.step / w25n01gwzeig-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Winbond Elec datasheet (70 pp, sha256 a464346853af1dd0, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF