component
VS-70TPS12PBF
Public Made by Adomby adom
Vishay Intertech Thyristors (SCR)/Modules, TO-247-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownVS-70TPS12PBF
Vishay Intertech · Thyristors (SCR)/Modules · TO-247-3
VS-70TPS12PBF from Vishay Intertech, in a TO-247-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Main cathode terminal of the single SCR; the device is rated for VRRM/VDRM of 1200 V or 1600 V depending on the variant and a lead current limitation IT(RMS) of 75 A. |
| 2 | A | passive | Main anode terminal of the single SCR; the datasheet rates the maximum average on-state current IT(AV) at 70 A with TC = 82 °C for 180° conduction. |
| 3 | G | input | Gate trigger terminal; the datasheet limits are maximum peak gate current IGM 2.5 A, maximum peak gate power PGM 10 W, and maximum peak negative gate voltage VGM 10 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | TO-247-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Repetitive peak off-state voltage (1200 V part) | VRRM/VDRM | 1200 | V | 1 | |||
| Non-repetitive peak reverse voltage (1200 V part) | VRSM | 1300 | V | 1 | |||
| Maximum average on-state current | IT(AV) | 70 | A | TC = 82 °C, 180° conduction half sine wave | 2 | ||
| Maximum continuous RMS on-state current as AC switch | IT(RMS) | 75 | A | Lead current limitation | 2 | ||
| Maximum peak one-cycle non-repetitive surge current | ITSM | 930 | A | 10 ms sine pulse, rated VRRM applied, initial TJ = TJ maximum | 2 | ||
| Maximum peak one-cycle non-repetitive surge current | ITSM | 1100 | A | 10 ms sine pulse, no voltage reapplied | 2 | ||
| Maximum I2t for fusing | I2t | 4325 | A2s | 10 ms sine pulse, rated VRRM applied | 2 | ||
| Maximum I2t for fusing | I2t | 6115 | A2s | 10 ms sine pulse, no voltage reapplied | 2 | ||
| Maximum I2t for fusing | I2t | 61150 | A2s | t = 0.1 ms to 10 ms, no voltage reapplied | 2 | ||
| Maximum rate of rise of turned-on current | dI/dt | 150 | A/μs | TJ = 25 °C | 2 | ||
| Maximum rate of rise of off-state voltage | dV/dt | 500 | V/μs | TJ = 125 °C | 2 | ||
| Maximum peak on-state voltage | VTM | 1.4 | V | 100 A, TJ = 25 °C | 2 | ||
| Maximum holding current | IH | 200 | mA | Anode supply = 6 V, resistive load, initial IT = 1 A, TJ = 25 °C | 2 | ||
| Maximum latching current | IL | 400 | mA | Anode supply = 6 V, resistive load, TJ = 25 °C | 2 | ||
| Maximum reverse and direct leakage current | IRRM/IDRM | 1 | mA | TJ = 25 °C, VR = rated VRRM/VDRM | 2 | ||
| Maximum reverse and direct leakage current | IRRM/IDRM | 15 | mA | TJ = 125 °C | 2 | ||
| Maximum peak gate power | PGM | 10 | W | T = 30 μs | 2 | ||
| Maximum average gate power | PG(AV) | 2.5 | W | 2 | |||
| Maximum peak gate current | IGM | 2.5 | A | 2 | |||
| Maximum peak negative gate voltage | VGM | 10 | V | 2 | |||
| Maximum required DC gate voltage to trigger | VGT | 1.8 | V | TJ = -40 °C, Anode supply = 6 V resistive load | 2 | ||
| Maximum required DC gate voltage to trigger | VGT | 1.5 | V | TJ = 25 °C | 2 | ||
| Maximum required DC gate voltage to trigger | VGT | 1.1 | V | TJ = 125 °C | 2 | ||
| Maximum required DC gate current to trigger | IGT | 150 | mA | TJ = -40 °C, Anode supply = 6 V resistive load | 2 | ||
| Maximum required DC gate current to trigger | IGT | 100 | mA | TJ = 25 °C | 2 | ||
| Maximum required DC gate current to trigger | IGT | 80 | mA | TJ = 125 °C | 2 | ||
| Maximum DC gate voltage not to trigger | VGD | 0.25 | V | TJ = 125 °C, VDRM = rated value | 2 | ||
| Maximum DC gate current not to trigger | IGD | 6 | mA | 2 | |||
| Maximum junction temperature range | TJ | -40 | 125 | °C | 3 | ||
| Maximum storage temperature range | TStg | -40 | 150 | °C | 3 | ||
| Maximum thermal resistance, junction to case | RthJC | 0.27 | °C/W | DC operation | 3 | ||
| Maximum thermal resistance, junction to ambient | RthJA | 40 | °C/W | 3 | |||
| Mounting torque, minimum | 6 | kgf · cm | 3 | ||||
| Mounting torque, maximum | 12 | lbf · in | 3 | ||||
| Typical thermal resistance, case to heatsink | RthCS | 0.2 | °C/W | Mounting surface, smooth and greased | 3 | ||
| Low level value of threshold voltage | VT(TO)1 | 0.916 | V | TJ = 125 °C | 2 | ||
| High level value of threshold voltage | VT(TO)2 | 1.21 | V | 2 | |||
| Low level value of on-state slope resistance | rt1 | 4.138 | m | 2 | |||
| High level value of on-state slope resistance | rt2 | 3.43 | m | 2 |
CAD (KiCad official)
- Symbol:
VS-70TPS12PBF - Footprint:
Package_TO_SOT_THT:TO-247-3_Vertical - 3D model: TO-247-3 (KiCad packages3D, STEP)
- 3D model files:
vs-70tps12pbf-etched.step/vs-70tps12pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);vs-70tps12pbf.step/vs-70tps12pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (8 pp, sha256
0570eece7302ba70, retrieved 2026-10-14, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).