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docs vrh4801ntx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json vrh4801ntx: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md vrh4801ntx: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
vrh4801ntx-etched.fit.json vrh4801ntx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
vrh4801ntx-etched.glb vrh4801ntx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
vrh4801ntx-etched.step vrh4801ntx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
vrh4801ntx.glb Publish 0.1.0 · Ray
vrh4801ntx.kicad_mod Publish 0.1.0 · Ray
vrh4801ntx.kicad_sym Publish 0.1.0 · Ray
vrh4801ntx.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
vrh4801ntx.step Publish 0.1.0 · Ray

VRH4801NTX

AnaSem · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

VRH4801NTX from AnaSem, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Voltage input. Operating range 1.6V to 6.0V (absolute max -0.3V to +7.0V). Decouple to VSS with a ≥1.0µF ceramic capacitor close to the pin.
2 VSS power_in Power ground / negative supply return for the regulator and all internal circuitry.
3 EN input Chip enable (On/Off). VENH ≥ 1.2V enables the regulator; VENL ≤ 0.3V disables it and triggers CL auto-discharge (RDIS typ. 160Ω). EN input current ≈0.25~5µA at VEN=VIN=5V. Do not leave floating.
4 NC unconnected No internal connection (open). Leave floating or tie to a copper island; do not use as a routing via.
5 VOUT power_out Regulated output, factory-trimmed to 4.80V ±1% (Iout=30mA). Maximum output current 250mA, current limit typ. 300mA. Requires a ≥1.0µF ceramic output capacitor (CL) to VSS for phase compensation. Must not exceed VIN+0.3V to avoid parasitic-diode conduction into VIN.

Key specifications

Parameter Value
Manufacturer AnaSem
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • VRH4801NTXT
  • VRH4801NTXL
  • VRH4801NTXV

CAD (KiCad official)

  • Symbol: VRH4801NTX
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: vrh4801ntx-etched.step / vrh4801ntx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vrh4801ntx.step / vrh4801ntx.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
vrh4801ntx.step 85 KB You want the bare part, or you mark your own boards.
vrh4801ntx-etched.step 1.7 MB You want the part with VRH4801NTX already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 427 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: AnaSem datasheet (35 pp, sha256 b9bb74b00e80c8df, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF