component
VRD1228MTX
Public Made by Adomby adom
AnaSem Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownVRD1228MTX
AnaSem · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-6
VRD1228MTX from AnaSem, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN1 | input | Channel 1 enable input: the EN high level is 1.2 V to 6.0 V and the EN low level is 0.3 V max; setting EN to VSS shuts channel 1 down and discharges CL through the 160 Ω auto-discharge resistor. |
| 2 | VIN | power_in | Voltage input with an operating range of 1.6 V to 6.0 V and an absolute maximum range of -0.3 V to +7.0 V, with at least 1.0 µF recommended between VIN and VSS. |
| 3 | EN2 | input | Channel 2 enable input: the EN high level is 1.2 V to 6.0 V and the EN low level is 0.3 V max; setting EN to VSS shuts channel 2 down and discharges CL through the 160 Ω auto-discharge resistor. |
| 4 | VOUT2 | power_out | Channel 2 regulated output, which must not exceed VIN+0.3 V, with an output capacitor of at least 1.0 µF (ceramic, low ESR) connected as close as possible between VOUT and VSS. |
| 5 | VSS | power_in | Power ground, the common return for VIN, the output capacitors and the EN pins. |
| 6 | VOUT1 | power_out | Channel 1 regulated output, which must not exceed VIN+0.3 V, with an output capacitor of at least 1.0 µF (ceramic, low ESR) connected as close as possible between VOUT and VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | AnaSem |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy, Ch-1 (VOUT≦1.90 V) | VOUT | -20 | 20 | mV | VOUT≦1.90V; VOUT+1.0V≦VIN≦6.0V, IOUT=30mA, Ta=-40°C~+85°C | 7 | |
| Output voltage accuracy, Ch-2 (VOUT≧1.95 V) | VOUT | -1 | 1 | % | VOUT≧1.95V; VOUT+1.0V≦VIN≦6.0V, IOUT=30mA, Ta=-40°C~+85°C | 7 | |
| Output voltage temperature coefficient | ΔVOUT/ΔTa•VOUT | -20 | 20 | ppm/°C | VEN=VIN, IOUT=300mA, Ta=-40°C~+85°C | 8 | |
| Dropout voltage, Ch-1 (1.2 V≦VOUT≦1.65 V) | VDROP | 210 | 340 | mV | IOUT=100mA, 1.2V≦VOUT≦1.65V | 7 | |
| Dropout voltage, Ch-2 (2.3 V≦VOUT≦2.85 V) | VDROP | 100 | 150 | mV | IOUT=100mA, 2.3V≦VOUT≦2.85V | 7 | |
| Load regulation | ΔVOUT | 10 | 40 | mV | VIN=VOUT+1.0V, IOUT=0.1mA~100mA | 8 | |
| Line regulation | ΔVOUT/ΔVIN•VOUT | 0.01 | 0.1 | %/V | VOUT+1.0V≦VIN≦6.0V, IOUT=30mA | 8 | |
| Current consumption | IDD | 50 | 80 | µA | VIN=VOUT+1.0V, VOUT=Open, IOUT=0mA | 8 | |
| Standby current | ISTB | 0.01 | 0.1 | µA | EN=VSS | 8 | |
| Input voltage | VIN | 1.6 | 6 | V | 8 | ||
| Limit current | ILIMIT | 300 | mA | EN=VIN | 8 | ||
| EN high level voltage | VENH | 1.2 | 6 | V | 8 | ||
| EN low level voltage | VENL | 0.3 | V | 8 | |||
| EN high level current | IENH | -0.1 | 0.1 | µA | VEN=VIN | 8 | |
| EN low level current | IENL | -0.1 | 0.1 | µA | VEN=VSS | 8 | |
| Input voltage range (absolute maximum) | VIN | -0.3 | 7 | V | 6 | ||
| Output current (absolute maximum) | IOUT | 500 | mA | 6 | |||
| Power dissipation, SOT-26 | PD | 600 | mW | SOT-26 package; depends on board mounting (PCB 50×50×1.6 mm) | 6 | ||
| Operating temperature range | TOPR | -40 | 85 | °C | 6 | ||
| Storage temperature range | TSTG | -55 | 125 | °C | 6 | ||
| Output voltage, Ch-1 nominal (code 12) | VOUT1 | 1.2 | V | Ch-1 output voltage code 12 per numbering guide | 3 | ||
| Output voltage, Ch-2 nominal (code 28) | VOUT2 | 2.8 | V | Ch-2 output voltage code 28 per numbering guide | 3 |
CAD (KiCad official)
- Symbol:
VRD1228MTX - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
vrd1228mtx-etched.step/vrd1228mtx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);vrd1228mtx.step/vrd1228mtx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: AnaSem datasheet (35 pp, sha256
7f8a0b5646548c27, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).