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Initial commit: component/vps8703b

Ray ·4ce5fd087d ·1mo ago
2 files changed +191
README.mdadded+45
@@ -0,0 +1,45 @@+# VPS8703B++**VPSC** · Power Management - Specialized · ESOP8++VPS8703B from VPSC, in a ESOP8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLK | input | External clock input and dead-zone time adaptive mode selection; when floating, internal pull-up selects 250 kHz fixed dead-zone; when tied to GND, enables adaptive dead-zone mode; accepts external clock for synchronization. |+| 2 | GND | power_in | Ground reference for logic and analog circuits. |+| 3 | VIN | power_in | Power supply input, 6-30V nominal; bypass with 1 µF ceramic capacitor placed adjacent to device pins. |+| 4 | EN | input | Active-high logic enable; pulling to low stops chip operation and enables ultra-low standby mode (~19 µA); floating defaults to high via internal pull-up. |+| 5 | VD2 | output | Bridge leg 2 transformer drive output (complementary to VD1); peak drain current 1.6 A absolute maximum, rated for VIN+0.3 V. |+| 6 | NC | unconnected | No internal connection; may be left unconnected or tied to ground. |+| 7 | NC | unconnected | No internal connection; may be left unconnected or tied to ground. |+| 8 | VD1 | output | Bridge leg 1 transformer drive output (complementary to VD2); peak drain current 1.6 A absolute maximum, rated for VIN+0.3 V. |+| 9 | EP | power_in | Exposed thermal pad internally bonded to GND; not used as primary electrical connection but must be soldered to large ground plane to enhance heat dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | VPSC |+| Package | ESOP8 |+| Category | Power Management (PMIC) |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `VPS8703B`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`+- 3D model: ESOP8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [VPSC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904483859668992) (12 pp, sha256 `7e0212bdecfb48f8`, retrieved 2026-09-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/vps8703b-datasheet.pdf)
page.jsonadded+146
@@ -0,0 +1,146 @@+{+  "slug": "vps8703b",+  "version": "0.1.0",+  "type": "component",+  "description": "VPSC Power Management - Specialized, ESOP8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "vps8703b",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "vps8703b.kicad_sym",+    "vps8703b.kicad_mod",+    "vps8703b.glb",+    "vps8703b.step",+    "vps8703b.lbr",+    "docs/hero.png",+    "docs/vps8703b-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "VPS8703B",+    "manufacturer": "VPSC",+    "package": "ESOP8",+    "pin_count": 9,+    "category": "Power Management (PMIC)",+    "subcategory": "Power Management - Specialized",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904483859668992",+    "parts": {+      "symbol": "vps8703b.kicad_sym",+      "footprint": "vps8703b.kicad_mod",+      "model_3d": "vps8703b.glb",+      "model_3d_step": "vps8703b.step",+      "lbr": "vps8703b.lbr"+    },+    "distributor_links": {+      "lcsc": "C7470608"+    },+    "pins": [+      {+        "number": "1",+        "name": "CLK",+        "type": "input",+        "description": "External clock input and dead-zone time adaptive mode selection; when floating, internal pull-up selects 250 kHz fixed dead-zone; when tied to GND, enables adaptive dead-zone mode; accepts external clock for synchronization."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for logic and analog circuits."+      },+      {+        "number": "3",+        "name": "VIN",+        "type": "power_in",+        "description": "Power supply input, 6-30V nominal; bypass with 1 µF ceramic capacitor placed adjacent to device pins."+      },+      {+        "number": "4",+        "name": "EN",+        "type": "input",+        "description": "Active-high logic enable; pulling to low stops chip operation and enables ultra-low standby mode (~19 µA); floating defaults to high via internal pull-up."+      },+      {+        "number": "5",+        "name": "VD2",+        "type": "output",+        "description": "Bridge leg 2 transformer drive output (complementary to VD1); peak drain current 1.6 A absolute maximum, rated for VIN+0.3 V."+      },+      {+        "number": "6",+        "name": "NC",+        "type": "unconnected",+        "description": "No internal connection; may be left unconnected or tied to ground."+      },+      {+        "number": "7",+        "name": "NC",+        "type": "unconnected",+        "description": "No internal connection; may be left unconnected or tied to ground."+      },+      {+        "number": "8",+        "name": "VD1",+        "type": "output",+        "description": "Bridge leg 1 transformer drive output (complementary to VD2); peak drain current 1.6 A absolute maximum, rated for VIN+0.3 V."+      },+      {+        "number": "9",+        "name": "EP",+        "type": "power_in",+        "description": "Exposed thermal pad internally bonded to GND; not used as primary electrical connection but must be soldered to large ground plane to enhance heat dissipation."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: ESOP8 package designation with exposed pad (EP) listed as pin 9 is non-standard; typically ESOP8 def"+        ],+        "pages_sent": 12,+        "cost_usd": 0.2761,+        "at": "2026-09-17T16:59:43"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904483859668992",+        "pages": 12,+        "sha256": "7e0212bdecfb48f8",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 9,+        "described": 9,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file