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docs vps8703: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers vps8703: viewers · Ray 1mo ago
package.json vps8703: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json vps8703: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/vps8703 · Ray 1mo ago
vps8703-etched.fit.json vps8703: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
vps8703-etched.glb vps8703: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
vps8703-etched.step vps8703: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
vps8703.glb Publish 0.1.0 · Ray 1mo ago
vps8703.kicad_mod Publish 0.1.0 · Ray 1mo ago
vps8703.kicad_sym Publish 0.1.0 · Ray 1mo ago
vps8703.lbr Publish 0.1.0 · Ray 1mo ago
vps8703.step Publish 0.1.0 · Ray 1mo ago

VPS8703

VPSC · Power Management - Specialized · ESOP-8

VPS8703 from VPSC, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLK input Oscillator clock adjustment input; floating state gives 250 kHz default; external resistor to GND adjusts frequency.
2 GND power_in Logic circuit and analog circuit ground.
3 VCC power_in Power supply input; requires 1uF bypass capacitor to GND placed close to device.
4 EN input Active-low enable/disable input; device enabled when high or floating, disabled when low.
5 VD2 output Transformer driver output 2.
6 NC unconnected No function pin.
7 NC unconnected No function pin.
8 VD1 output Transformer driver output 1.
9 EP power_in Exposed thermal pad internally connected to GND; solder to large ground area for enhanced heat dissipation.

Key specifications

Parameter Value
Manufacturer VPSC
Package ESOP-8
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: VPS8703
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: vps8703-etched.step / vps8703-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vps8703.step / vps8703.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VPSC datasheet (9 pp, sha256 9249e0e51c50632b, retrieved 2026-09-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF