main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers vps6501: viewers · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago
vps6501-etched.glb Publish 0.1.0 · Ray 8d ago
vps6501-etched.step vps6501: factory component page (tier=lcsc) · Ray 8d ago
vps6501-hero.glb vps6501: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
vps6501-hero.overlay.json Publish 0.1.0 · Ray 8d ago
vps6501.glb Publish 0.1.0 · Ray 8d ago
vps6501.kicad_mod Publish 0.1.0 · Ray 8d ago
vps6501.kicad_sym Publish 0.1.0 · Ray 8d ago
vps6501.lbr Publish 0.1.0 · Ray 8d ago
vps6501.step Publish 0.1.0 · Ray 8d ago

VPS6501

VPSC · Power Management - Specialized · SOT23-5

VPS6501 from VPSC, in a SOT23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VD1 output Transformer drive output 1 is the drain of the internal 24 V / 0.3 Ω LDMOS, with drain voltage limited to -0.3 V to 24 V and peak current limited to 0.8 A.
2 VIN power_in Supply input rated 2.8 V to 6 V (absolute maximum -0.3 V to 10 V), to be bypassed to GND with a 1 µF capacitor placed as close to the device as possible.
3 VD2 output Transformer drive output 2 is the drain of the second internal LDMOS, with drain voltage limited to -0.3 V to 24 V and peak current limited to 0.8 A.
4 GND power_in Logic circuit and analog circuit ground for the device.
5 GND power_in Logic circuit and analog circuit ground for the device (second ground pin, listed together with pin 4).

Key specifications

Parameter Value
Manufacturer VPSC
Package SOT23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN input voltage (absolute maximum) VIN -0.3 10 V 2
LDMOS drain voltage (absolute maximum) VD1, VD2 -0.3 24 V 2
LDMOS peak current (absolute maximum) I(VD1)Pk, I(VD2)Pk 0.8 A 2
Maximum operating junction temperature TJMAX 150 ℃ 2
Storage temperature range TSTG -55 150 ℃ 2
Input voltage range VIN 2.8 6 V 3
LDMOS drain current IVD1, IVD2 0.5 A 3
Operating junction temperature TJ -40 125 ℃ 3
Input voltage range VIN 2.8 6 V 3
Start-up voltage VIN(ON) 2.4 2.65 2.8 V VIN rising 3
Quiescent current IQ 0.5 1 mA VD1, VD2 floating 3
LDMOS on-resistance RDS(ON) 300 500 mΩ VIN>3.5V, IDS1/IDS2=0.2A, T=25℃ 3
LDMOS on-resistance RDS(ON) 420 700 mΩ VIN>3.5V, IDS1/IDS2=0.2A, T=100℃ 3
Current clamp limit, steady state ILIM 0.5 0.8 A VD1, VD2, VIN shorted, test IVIN 3
Dead time between VD1 and VD2 tBBM 120 175 230 ns VD1/VD2 each connected 50Ω to VIN 3
Operating frequency fSW0 300 360 420 kHz VD1/VD2 each connected 50Ω to 5V 3
Over-temperature protection threshold TSHDN 146 167 178 ℃ 3
Voltage slew rate VSLEW 115 V/us VD1/VD2 each connected 50Ω to VIN 3
Start-up hysteresis voltage VIN(HYS) 0.3 V VIN falling 3
Over-temperature protection hysteresis TSHDN(HYS) 15 ℃ 3

CAD (KiCad official)

  • Symbol: VPS6501
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT23-5 (KiCad packages3D, STEP)
  • 3D model files: vps6501-etched.step / vps6501-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vps6501.step / vps6501.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VPSC datasheet (13 pp, sha256 1704a48476d79152, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF