VPC28C44

{
  "slug": "vpc28c44",
  "version": "0.1.0",
  "type": "component",
  "description": "VPSC DC-DC Converters, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "vpc28c44",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "vpc28c44.kicad_sym",
    "vpc28c44.kicad_mod",
    "vpc28c44.glb",
    "vpc28c44.step",
    "vpc28c44.lbr",
    "docs/hero.png",
    "docs/vpc28c44-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "vpc28c44-hero.glb",
    "vpc28c44-hero.overlay.json",
    "vpc28c44-etched.glb"
  ],
  "component": {
    "mpn": "VPC28C44",
    "manufacturer": "VPSC",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "DC-DC Converters",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590907009024155648",
    "parts": {
      "symbol": "vpc28c44.kicad_sym",
      "footprint": "vpc28c44.kicad_mod",
      "model_3d": "vpc28c44-hero.glb",
      "model_3d_plain": "vpc28c44-etched.glb",
      "model_3d_step": "vpc28c44-etched.step",
      "model_3d_step_plain": "vpc28c44.step",
      "lbr": "vpc28c44.lbr"
    },
    "distributor_links": {
      "lcsc": "C7470599"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T22:49:39Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "COMP",
        "type": "passive",
        "description": "Error amplifier compensation pin where the external compensation network connects; the amplifier is internally current-limited, so forcing COMP to ground sets zero duty cycle."
      },
      {
        "number": "2",
        "name": "FB",
        "type": "input",
        "description": "Inverting input of the internal error amplifier (non-inverting input is internally fixed at 2.5 V), used for the voltage feedback loop, with the lead kept short for stability."
      },
      {
        "number": "3",
        "name": "CS",
        "type": "input",
        "description": "Primary-side current sense input tied to the sense resistor that terminates OUT conduction via the PWM comparator, with a typical maximum comparison threshold of 1 V."
      },
      {
        "number": "4",
        "name": "RT/CT",
        "type": "passive",
        "description": "Oscillator timing pin: timing resistor RT connects from VREF and timing capacitor CT to GND, with f_OSC ≈ 1.6/(RT×CT) and RT never to be below 5 kΩ."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Analog ground and signal/power return for packages without a separate PGND pin, which should be kept separate from the high-current gate-drive return path."
      },
      {
        "number": "6",
        "name": "OUT",
        "type": "output",
        "description": "Push-pull gate drive output for directly driving an external MOSFET, sourcing and sinking up to 1 A peak, and held low when VDD is below the turn-on threshold; absolute maximum voltage to GND is 30 V."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Controller bias supply input, with absolute maximum 30 V and recommended maximum 28 V, requiring a ~0.1 µF bypass capacitor close to the pin and an additional bulk capacitor at least 10× the main switch gate capacitance."
      },
      {
        "number": "8",
        "name": "VREF",
        "type": "power_out",
        "description": "5 V reference output derived from VDD, which requires a minimum 0.1 µF ceramic bypass capacitor placed as close to the pin as possible and additional bypass for any external load."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet's pin table (page 2) gives names, numbers and functions but no electrical pin type cla; COMP and RT/CT are typed as passive because they act as both sourcing/sinking or timing nodes; the d; The datasheet covers the VPCx8C4x family (VPC28C40–C45 and VPC38C40–C45) in one SOP8 package with on"
        ],
        "pages_sent": 15,
        "cost_usd": 0.0879,
        "at": "2026-10-17T22:47:20"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590907009024155648",
        "pages": 15,
        "sha256": "41de8f28b106ea3c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "vpc28c44.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "vpc28c44-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4e6cf4746d5ce233bde47d193bbb4ce2e265443d2b88613e7b264dbdb9f1b46f",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}