component
VPC2188B
Public Made by Adomby adom
VPSC AC-DC Controllers And Regulators, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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VPC2188B
VPSC · AC-DC Controllers And Regulators · MSOP-10
VPC2188B from VPSC, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COM | bidirectional | Optocoupler feedback pin in SSR mode that sets the regulated peak current and frequency, with internal RC compensation for direct optocoupler connection, open-circuit voltage 5.0-5.8V and short-circuit current 0.6-1.5mA. |
| 2 | VIN | power_in | High-voltage startup input; the VIN-to-VDD high-voltage LDO regulates VDD to 8.7V and supplies up to 20mA, with a 110V absolute maximum rating on VIN to GND. |
| 3 | UVP | input | Input undervoltage comparator pin with a 2.0V threshold that sinks 4.4uA when in protection and sets the hysteresis through its pull-up resistor, clamped at 5.5V typical. |
| 4 | VDD | power_in | Chip supply pin with an 18.6V clamp, where clamp sink current above 6.6mA triggers self-recovering overvoltage protection, and an absolute maximum rating of 25V. |
| 5 | GATE | output | Drive output for the external MOSFET, rated 0.8A peak source and 1.5A peak sink at VGATE=7.5V, with an absolute maximum voltage of 25V to GND. |
| 6 | GND | power_in | Chip power reference ground for the controller. |
| 7 | CS | input | Current-sense input with a 500mV maximum current-limit threshold for VPC2188B, where CS above 1.6 times the maximum threshold triggers self-recovering short-circuit protection and an absolute maximum of 1.25V applies. |
| 8 | RT | passive | Frequency-programming pin where a resistor to GND sets the oscillator frequency, with a 2.02V typical reference and 300kHz typical at RT=22kΩ. |
| 9 | SS | passive | External soft-start pin where a capacitor to GND sets the soft-start time, and the internal soft-start time is 1.2ms typical when the pin is left open. |
| 10 | FB | input | Voltage feedback pin for PSR or resistor-divider sensing, auto-selected when FB goes negative while GATE is high or COM is tied to GND, with an absolute maximum input current of 2.5mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VPSC |
| Package | MSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN voltage to GND | VIN | -0.3 | 110 | V | 3 | ||
| VIN clamp continuous current | IVIN(CLAMP) | 1 | mA | 3 | |||
| FB pin current | IFB | -2.5 | mA | 3 | |||
| VDD and GATE voltage to GND | VDD | -0.3 | 25 | V | 3 | ||
| CS voltage to GND | CS | -0.3 | 1.25 | V | 3 | ||
| All other pins voltage to GND | -0.3 | 6.6 | V | 3 | |||
| Maximum operating junction temperature | TJMAX | 150 | ℃ | 3 | |||
| ESD capability, human body model | V(ESD) HBM | -2000 | 2000 | V | per ESDA/JEDEC JS-001-2017, 1 pulse | 3 | |
| ESD capability, charged device model | V(ESD) CDM | -1000 | 1000 | V | per ESDA/JEDEC JS-002-2014 | 3 | |
| VIN input voltage | VIN | 4 | 100 | V | 3 | ||
| Operating junction temperature | TJ | -40 | 125 | ℃ | 3 | ||
| Normal operating current | IQ | 2 | 3 | mA | GATE floating, COM connected to GND via 3.3k | 3 | |
| VIN supply capability | IVIN(SRC) | 15 | 20 | mA | VIN=12V, VDD=6.5V | 3 | |
| VIN ESD clamp voltage | VIN(clamp) | 110 | 118 | 128 | V | IVIN=1mA, VDD=12V | 3 |
| VDD start-up voltage (rising) | VDD(ON) | 6.9 | 7.4 | 7.9 | V | VDD rising | 3 |
| VDD lock-out voltage (falling) | VDD(OFF) | 5.8 | 6.3 | 6.8 | V | VDD falling | 3 |
| VIN to VDD regulated voltage | VDD(REG) | 8.1 | 8.7 | 9.3 | V | VDD and GATE unloaded | 3 |
| VIN to VDD dropout voltage | VDD(DO) | 1.2 | V | IVDD(LOAD)=5mA, VIN=8V | 3 | ||
| VDD overvoltage protection threshold | VDD(OVP) | 17.5 | 18.6 | 19.7 | V | VDD rising | 4 |
| VDD ESD clamp voltage | VDD(clamp) | 23 | 27 | V | IVDD(SNK)=10mA | 4 | |
| Current limit threshold voltage | VCS(LIM) | 450 | 500 | 550 | mV | 4 | |
| Minimum threshold voltage | VCS(MIN) | 90 | 100 | 110 | mV | PSR feedback mode | 4 |
| Short-circuit protection threshold | VSCP(LIM) | 720 | 800 | 880 | mV | VCOM exceeds VCOM(OLP) | 4 |
| SS pin open-circuit voltage | VSS(OPEN) | 5 | 5.4 | 5.8 | V | CLK floating (as printed) | 4 |
| Internal soft-start time | tSS(IN) | 0.8 | 1.2 | 1.6 | mS | SS floating | 4 |
| External soft-start current | ISS | 22 | 28 | 34 | uA | 4 | |
| Oscillator frequency | FOSC1 | 135 | 150 | 165 | kHz | RT=44.2kΩ | 4 |
| Oscillator frequency | FOSC2 | 270 | 300 | 330 | kHz | RT=22kΩ | 4 |
| Oscillator frequency | FOSC3 | 440 | 500 | 560 | kHz | RT=13.3kΩ | 4 |
| RT pin reference voltage | VRT | 1.92 | 2.02 | 2.12 | V | 4 | |
| UVP comparison threshold voltage | VREF(UVP) | 1.9 | 2 | 2.1 | V | 4 | |
| UVP pin clamp voltage | VUVP(CLAMP) | 5 | 5.5 | 6 | V | IUVP=0.6mA injected into UVP pin | 4 |
| UVP pull-down current after protection | IUVP(SNK) | 3.4 | 4.4 | 5.4 | uA | VUVP=1.8V | 4 |
| EA reference voltage | VREF(REG) | 1.975 | 2 | 2.025 | V | 4 | |
| Maximum duty cycle | DMAX | 75 | 80 | 85 | % | 4 | |
| COM pin open-circuit voltage | VCOM(OPEN) | 5 | 5.4 | 5.8 | V | 5 | |
| COM pin short-circuit current | ICOM | 0.6 | 1.1 | 1.5 | mA | VCOM=0V | 5 |
| GATE high-level drop (VDD-VGATE) with source load | VGATEH | 185 | 400 | mV | IGATE=50mA | 5 | |
| GATE low-level voltage with 100mA pull-up | VGATEH | 170 | 350 | mV | IGATE=-100mA | 5 | |
| Overtemperature protection threshold | TSHDN | 148 | 163 | 178 | ℃ | 5 | |
| Enable-off input current | IVIN(SHDN) | 0.1 | uA | VUVP=0V | 3 | ||
| UVP-protected input current | IVIN(UVP) | 294 | uA | VUVP=1.8V | 3 | ||
| VBV(DIODE) anti-backflow diode voltage rating | VBV(DIODE) | 37 | V | 4 | |||
| VDD OVP sink current | IDDSNK(OVP) | 6.6 | mA | VDD=VDD(OVP) | 4 | ||
| Current-limit comparator delay | tCS(DLY) | 40 | nS | CS from 0 to 0.6V to GATE low | 4 | ||
| UVP enable LDO threshold (rising) | VUVP(ON) | 0.9 | V | VUVP rising | 4 | ||
| UVP disable LDO threshold (falling) | VUVP(OFF) | 0.6 | V | VUVP falling | 4 | ||
| FB pin input current as feedback | IFB | 40 | nA | FB pin used as feedback voltage | 4 | ||
| COM pin input current as feedback | IFB | -20 | uA | COM pin used as feedback voltage | 4 | ||
| Sampling delay time | TD(SAMP) | 252 | nS | RT=22kΩ | 4 | ||
| Sleep time in self-recovery protection | TSLEEP(SR) | 800 | mS | 4 | |||
| PWM comparator blanking time | tLEB(CS) | 95 | nS | 4 | |||
| COM voltage at maximum duty cycle | VCOM(DMAX) | 3.75 | V | 5 | |||
| Burst-mode threshold voltage | VCOM(SKIP) | 1 | V | 5 | |||
| Burst-mode hysteresis voltage | VCOM(HYS) | 55 | mV | 5 | |||
| GATE peak source current | IGATE(SRC) | 0.8 | A | VGATE=7.5V | 5 | ||
| GATE peak sink current | IGATE(SINK) | 1.5 | A | VGATE=7.5V | 5 | ||
| GATE rise time | tr | 16 | nS | GATE to GND with 1nF | 5 | ||
| GATE fall time | tf | 8 | nS | GATE to GND with 1nF | 5 | ||
| Overtemperature protection hysteresis | TSHDN(HYS) | 18 | ℃ | 5 |
CAD (KiCad official)
- Symbol:
VPC2188B - Footprint:
Package_SO:MSOP-10_3x3mm_P0.5mm - 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files:
vpc2188b-etched.step/vpc2188b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);vpc2188b.step/vpc2188b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VPSC datasheet (15 pp, sha256
602d834347f7366b, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# VPC2188B
**VPSC** · AC-DC Controllers And Regulators · MSOP-10
VPC2188B from VPSC, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COM | bidirectional | Optocoupler feedback pin in SSR mode that sets the regulated peak current and frequency, with internal RC compensation for direct optocoupler connection, open-circuit voltage 5.0-5.8V and short-circuit current 0.6-1.5mA. |
| 2 | VIN | power_in | High-voltage startup input; the VIN-to-VDD high-voltage LDO regulates VDD to 8.7V and supplies up to 20mA, with a 110V absolute maximum rating on VIN to GND. |
| 3 | UVP | input | Input undervoltage comparator pin with a 2.0V threshold that sinks 4.4uA when in protection and sets the hysteresis through its pull-up resistor, clamped at 5.5V typical. |
| 4 | VDD | power_in | Chip supply pin with an 18.6V clamp, where clamp sink current above 6.6mA triggers self-recovering overvoltage protection, and an absolute maximum rating of 25V. |
| 5 | GATE | output | Drive output for the external MOSFET, rated 0.8A peak source and 1.5A peak sink at VGATE=7.5V, with an absolute maximum voltage of 25V to GND. |
| 6 | GND | power_in | Chip power reference ground for the controller. |
| 7 | CS | input | Current-sense input with a 500mV maximum current-limit threshold for VPC2188B, where CS above 1.6 times the maximum threshold triggers self-recovering short-circuit protection and an absolute maximum of 1.25V applies. |
| 8 | RT | passive | Frequency-programming pin where a resistor to GND sets the oscillator frequency, with a 2.02V typical reference and 300kHz typical at RT=22kΩ. |
| 9 | SS | passive | External soft-start pin where a capacitor to GND sets the soft-start time, and the internal soft-start time is 1.2ms typical when the pin is left open. |
| 10 | FB | input | Voltage feedback pin for PSR or resistor-divider sensing, auto-selected when FB goes negative while GATE is high or COM is tied to GND, with an absolute maximum input current of 2.5mA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VPSC |
| Package | MSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN voltage to GND | VIN | -0.3 | | 110 | V | | 3 |
| VIN clamp continuous current | IVIN(CLAMP) | | | 1 | mA | | 3 |
| FB pin current | IFB | -2.5 | | | mA | | 3 |
| VDD and GATE voltage to GND | VDD | -0.3 | | 25 | V | | 3 |
| CS voltage to GND | CS | -0.3 | | 1.25 | V | | 3 |
| All other pins voltage to GND | | -0.3 | | 6.6 | V | | 3 |
| Maximum operating junction temperature | TJMAX | | | 150 | ℃ | | 3 |
| ESD capability, human body model | V(ESD) HBM | -2000 | | 2000 | V | per ESDA/JEDEC JS-001-2017, 1 pulse | 3 |
| ESD capability, charged device model | V(ESD) CDM | -1000 | | 1000 | V | per ESDA/JEDEC JS-002-2014 | 3 |
| VIN input voltage | VIN | 4 | | 100 | V | | 3 |
| Operating junction temperature | TJ | -40 | | 125 | ℃ | | 3 |
| Normal operating current | IQ | 2 | | 3 | mA | GATE floating, COM connected to GND via 3.3k | 3 |
| VIN supply capability | IVIN(SRC) | 15 | | 20 | mA | VIN=12V, VDD=6.5V | 3 |
| VIN ESD clamp voltage | VIN(clamp) | 110 | 118 | 128 | V | IVIN=1mA, VDD=12V | 3 |
| VDD start-up voltage (rising) | VDD(ON) | 6.9 | 7.4 | 7.9 | V | VDD rising | 3 |
| VDD lock-out voltage (falling) | VDD(OFF) | 5.8 | 6.3 | 6.8 | V | VDD falling | 3 |
| VIN to VDD regulated voltage | VDD(REG) | 8.1 | 8.7 | 9.3 | V | VDD and GATE unloaded | 3 |
| VIN to VDD dropout voltage | VDD(DO) | | 1.2 | | V | IVDD(LOAD)=5mA, VIN=8V | 3 |
| VDD overvoltage protection threshold | VDD(OVP) | 17.5 | 18.6 | 19.7 | V | VDD rising | 4 |
| VDD ESD clamp voltage | VDD(clamp) | 23 | | 27 | V | IVDD(SNK)=10mA | 4 |
| Current limit threshold voltage | VCS(LIM) | 450 | 500 | 550 | mV | | 4 |
| Minimum threshold voltage | VCS(MIN) | 90 | 100 | 110 | mV | PSR feedback mode | 4 |
| Short-circuit protection threshold | VSCP(LIM) | 720 | 800 | 880 | mV | VCOM exceeds VCOM(OLP) | 4 |
| SS pin open-circuit voltage | VSS(OPEN) | 5 | 5.4 | 5.8 | V | CLK floating (as printed) | 4 |
| Internal soft-start time | tSS(IN) | 0.8 | 1.2 | 1.6 | mS | SS floating | 4 |
| External soft-start current | ISS | 22 | 28 | 34 | uA | | 4 |
| Oscillator frequency | FOSC1 | 135 | 150 | 165 | kHz | RT=44.2kΩ | 4 |
| Oscillator frequency | FOSC2 | 270 | 300 | 330 | kHz | RT=22kΩ | 4 |
| Oscillator frequency | FOSC3 | 440 | 500 | 560 | kHz | RT=13.3kΩ | 4 |
| RT pin reference voltage | VRT | 1.92 | 2.02 | 2.12 | V | | 4 |
| UVP comparison threshold voltage | VREF(UVP) | 1.9 | 2 | 2.1 | V | | 4 |
| UVP pin clamp voltage | VUVP(CLAMP) | 5 | 5.5 | 6 | V | IUVP=0.6mA injected into UVP pin | 4 |
| UVP pull-down current after protection | IUVP(SNK) | 3.4 | 4.4 | 5.4 | uA | VUVP=1.8V | 4 |
| EA reference voltage | VREF(REG) | 1.975 | 2 | 2.025 | V | | 4 |
| Maximum duty cycle | DMAX | 75 | 80 | 85 | % | | 4 |
| COM pin open-circuit voltage | VCOM(OPEN) | 5 | 5.4 | 5.8 | V | | 5 |
| COM pin short-circuit current | ICOM | 0.6 | 1.1 | 1.5 | mA | VCOM=0V | 5 |
| GATE high-level drop (VDD-VGATE) with source load | VGATEH | 185 | | 400 | mV | IGATE=50mA | 5 |
| GATE low-level voltage with 100mA pull-up | VGATEH | 170 | | 350 | mV | IGATE=-100mA | 5 |
| Overtemperature protection threshold | TSHDN | 148 | 163 | 178 | ℃ | | 5 |
| Enable-off input current | IVIN(SHDN) | | 0.1 | | uA | VUVP=0V | 3 |
| UVP-protected input current | IVIN(UVP) | | 294 | | uA | VUVP=1.8V | 3 |
| VBV(DIODE) anti-backflow diode voltage rating | VBV(DIODE) | | 37 | | V | | 4 |
| VDD OVP sink current | IDDSNK(OVP) | | 6.6 | | mA | VDD=VDD(OVP) | 4 |
| Current-limit comparator delay | tCS(DLY) | | 40 | | nS | CS from 0 to 0.6V to GATE low | 4 |
| UVP enable LDO threshold (rising) | VUVP(ON) | | 0.9 | | V | VUVP rising | 4 |
| UVP disable LDO threshold (falling) | VUVP(OFF) | | 0.6 | | V | VUVP falling | 4 |
| FB pin input current as feedback | IFB | | 40 | | nA | FB pin used as feedback voltage | 4 |
| COM pin input current as feedback | IFB | | -20 | | uA | COM pin used as feedback voltage | 4 |
| Sampling delay time | TD(SAMP) | | 252 | | nS | RT=22kΩ | 4 |
| Sleep time in self-recovery protection | TSLEEP(SR) | | 800 | | mS | | 4 |
| PWM comparator blanking time | tLEB(CS) | | 95 | | nS | | 4 |
| COM voltage at maximum duty cycle | VCOM(DMAX) | | 3.75 | | V | | 5 |
| Burst-mode threshold voltage | VCOM(SKIP) | | 1 | | V | | 5 |
| Burst-mode hysteresis voltage | VCOM(HYS) | | 55 | | mV | | 5 |
| GATE peak source current | IGATE(SRC) | | 0.8 | | A | VGATE=7.5V | 5 |
| GATE peak sink current | IGATE(SINK) | | 1.5 | | A | VGATE=7.5V | 5 |
| GATE rise time | tr | | 16 | | nS | GATE to GND with 1nF | 5 |
| GATE fall time | tf | | 8 | | nS | GATE to GND with 1nF | 5 |
| Overtemperature protection hysteresis | TSHDN(HYS) | | 18 | | ℃ | | 5 |
## CAD (KiCad official)
- Symbol: `VPC2188B`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: MSOP-10 (KiCad packages3D, STEP)
- 3D model files: `vpc2188b-etched.step` / `vpc2188b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `vpc2188b.step` / `vpc2188b.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [VPSC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589836015511625728) (15 pp, sha256 `602d834347f7366b`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/vpc2188b-datasheet.pdf)