component

VP3082-TD

Public Made by Adom

by adom

TDSEMIC RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 16d ago
viewers vp3082-td: viewers · Ray 16d ago
package.json Publish 0.1.0 · Ray 16d ago
page.json Set visibility: public · Ray 16d ago
README.md Publish 0.1.0 · Ray 16d ago
vp3082-td-etched.glb Publish 0.1.0 · Ray 16d ago
vp3082-td-etched.step vp3082-td: factory component page (tier=lcsc) · Ray 16d ago
vp3082-td-hero.glb vp3082-td: hero GLB from the etched model (keeps the MPN mark) · Ray 16d ago
vp3082-td-hero.overlay.json Publish 0.1.0 · Ray 16d ago
vp3082-td.glb Publish 0.1.0 · Ray 16d ago
vp3082-td.kicad_mod Publish 0.1.0 · Ray 16d ago
vp3082-td.kicad_sym Publish 0.1.0 · Ray 16d ago
vp3082-td.lbr Publish 0.1.0 · Ray 16d ago
vp3082-td.step Publish 0.1.0 · Ray 16d ago

VP3082-TD

TDSEMIC · RS-485 / RS-422 ICs · SOP-8

VP3082-TD from TDSEMIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output: RO is high when A is more than 200mV above B and low when A is more than 200mV below B; high-Z when RE is high.
2 RE input Receiver enable, active low; when RE is high the receiver output is high impedance.
3 DE input Driver enable, active high; when DE is low the driver outputs are high impedance, and when DE is high the device is in transmit state.
4 DI input Driver data input: DI low gives A high and B low, DI high gives the opposite.
5 GND power_in Ground, negative supply terminal.
6 A bidirectional Non-inverting receiver input and non-inverting driver output.
7 B bidirectional Inverting receiver input and inverting driver output.
8 VCC power_in Positive supply terminal (absolute maximum +5V).

Key specifications

Parameter Value
Manufacturer TDSEMIC
Package SOP-8
Category Interface
Pins 8

CAD (KiCad official)

  • Symbol: VP3082-TD
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: vp3082-td-etched.step / vp3082-td-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vp3082-td.step / vp3082-td.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TDSEMIC datasheet (11 pp, sha256 f17fa40e2c56bcf5, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF