# VO0631T

**Vishay Intertech** · Logic Output Optoisolators · SOIC-8

VO0631T from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Anode of the first channel's input LED; the LED forward current is 5 to 15 mA (IFH) recommended, with a maximum reverse input voltage of 5 V. |
| 2 | C1 | passive | Cathode of the first channel's input LED, which is driven from the input side; the LED reverse input voltage is limited to 5 V. |
| 3 | C2 | passive | Cathode of the second channel's input LED, which is driven from the input side; the LED reverse input voltage is limited to 5 V. |
| 4 | A2 | input | Anode of the second channel's input LED; the LED forward current is 5 to 15 mA (IFH) recommended, with a maximum reverse input voltage of 5 V. |
| 5 | GND | power_in | Ground reference for the detector side; a 0.1 µF bypass capacitor between pin 5 and pin 8 is recommended. |
| 6 | VO2 | output | Open-drain NMOS output of the second channel; the output current is limited to 50 mA maximum and the output voltage to 7 V maximum. |
| 7 | VO1 | output | Open-drain NMOS output of the first channel; the output current is limited to 50 mA maximum and the output voltage to 7 V maximum. |
| 8 | VCC | power_in | Detector supply voltage, 4.5 V to 5.5 V recommended, with a 7 V maximum for 1 minute; bypass to pin 5 with 0.1 µF. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOIC-8 |
| Category | Optoisolators |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature (recommended) | Tamb | -40 |  | 100 | °C |  | 2 |
| Supply voltage (recommended) | VCC | 4.5 |  | 5.5 | V |  | 2 |
| Input current low level | IFL | 0 |  | 250 | µA |  | 2 |
| Input current high level | IFH | 5 |  | 15 | mA |  | 2 |
| Output pull up resistor | RL | 330 |  | 4 | kΩ |  | 2 |
| Input forward voltage | VF | 1.1 | 1.4 | 1.7 | V | IF = 10 mA | 3 |
| Reverse current | IR |  | 0.01 | 10 | µA | VR = 5 V | 3 |
| High level supply current (dual channel) | ICCH |  | 6.5 | 12 | mA | IF = 10 mA | 3 |
| Low level supply current (dual channel) | ICCL |  | 6.5 | 12 | mA | IF = 10 mA | 3 |
| High level output current | IOH |  | 0.002 | 1 | µA | VE = 2 V, VO = 5.5 V, IF = 250 μA | 3 |
| Low level output voltage | VOL |  | 0.2 | 0.6 | V | VE = 2 V, IF = 5 mA, IOL (sinking) = 13 mA | 3 |
| Input threshold current | ITH |  | 2.4 | 5 | mA | VE = 2 V, VO = 5.5 V, IOL (sinking) = 13 mA | 3 |
| Propagation delay time to high output level | tPLH | 20 | 48 | 100 | ns | RL = 350 Ω, CL = 15 pF | 3 |
| Propagation delay time to low output level | tPHL | 25 | 50 | 100 | ns | RL = 350 Ω, CL = 15 pF | 3 |
| Pulse width distortion | /tPHL - tPLH/ |  | 2.9 | 35 | ns | RL = 350 Ω, CL = 15 pF | 3 |
| Propagation delay skew | tPSK |  | 8 | 40 | ns | RL = 350 Ω, CL = 15 pF | 3 |
| Common mode transient immunity (high) | /CMH/ | 5000 | 10000 |  | V/µs | /VCM/ = 50 V, VCC = 5 V, IF = 0 mA, VO(min) = 2 V, RL = 350 Ω, Tamb = 25 °C(2) | 5 |
| Common mode transient immunity (low) | /CML/ | 5000 | 10000 |  | V/µs | /VCM/ = 50 V, VCC = 5 V, IF = 7.5 mA, VO(max) = 0.8 V, RL = 350 Ω, Tamb = 25 °C(2) | 5 |
| Average forward current (dual channel) | IF |  |  | 15 | mA |  | 2 |
| Reverse input voltage | VR |  |  | 5 | V |  | 2 |
| Surge current | IFSM |  |  | 200 | mA | t = 100 μs | 2 |
| Output power dissipation (per channel for dual channel) | Pdiss |  |  | 25 | mW |  | 2 |
| Output current | IO |  |  | 50 | mA |  | 2 |
| Output voltage | VO |  |  | 7 | V |  | 2 |
| Output power dissipation (per channel for dual channel) | Pdiss |  |  | 60 | mW |  | 2 |
| Supply voltage (absolute maximum) | VCC |  |  | 7 | V | 1 min maximum | 2 |
| Isolation test voltage | VISO |  |  | 4000 | VRMS | t = 1 s | 2 |
| Storage temperature | Tstg | -55 |  | 150 | °C |  | 2 |
| Operating temperature (absolute maximum) | Tamb | -40 |  | 100 | °C |  | 2 |
| Lead solder temperature |  |  |  | 260 | °C | for 10 s | 2 |
| Solder reflow temperature |  |  |  | 260 | °C | for 1 min | 2 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | • Pure tin leads • Guaranteed AC and DC performance over | 1 |

## CAD (KiCad official)

- Symbol: `VO0631T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `vo0631t-etched.step` / `vo0631t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `vo0631t.step` / `vo0631t.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883796116033536) (10 pp, sha256 `aacda14d2768445b`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/vo0631t-datasheet.pdf)