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VO0630T

Public Made by Adom

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Vishay Intertech Logic Output Optoisolators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs Publish 0.1.0 · Ray 4h ago
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README.md Publish 0.1.0 · Ray 4h ago
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vo0630t-etched.step vo0630t: factory component page (tier=mfr) · Ray 4h ago
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VO0630T

Vishay Intertech · Logic Output Optoisolators · SOIC-8

VO0630T from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 passive Anode of the channel 1 input LED; the datasheet specifies a 5 mA low-input-current capability and a 5 mA to 15 mA high-level input current range (IFH).
2 C1 passive Cathode of the channel 1 input LED; the reverse input voltage is limited to 5 V.
3 C2 passive Cathode of the channel 2 input LED; the reverse input voltage is limited to 5 V.
4 A2 passive Anode of the channel 2 input LED; the average forward current for dual-channel operation is limited to 15 mA.
5 GND power_in Ground reference for the detector IC; a 0.1 µF bypass capacitor between pin 5 and pin 8 is recommended.
6 VO2 output Open-drain NMOS output of channel 2; the output voltage is limited to 7 V absolute maximum and the pull-up resistor is specified at 330 Ω to 4 kΩ.
7 VO1 output Open-drain NMOS output of channel 1; the output voltage is limited to 7 V absolute maximum and the pull-up resistor is specified at 330 Ω to 4 kΩ.
8 VCC power_in Supply voltage for the detector; the recommended supply range is 4.5 V to 5.5 V with a 7 V absolute maximum.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOIC-8
Category Optoisolators
Pins 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Pure tin leads • Guaranteed AC and DC performance over 1

CAD (KiCad official)

  • Symbol: VO0630T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: vo0630t-etched.step / vo0630t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vo0630t.step / vo0630t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (10 pp, sha256 1929354b62e8fbc0, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF