VNS1NV04DPTR-E
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers and Regulators, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
VNS1NV04DPTR-E
STMicroelectronics · AC-DC Controllers and Regulators · SO-8
VNS1NV04DPTR-E from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SOURCE1 | power_out | Source of channel 1 power MOSFET. Typically tied to the load return / low-side node; current returns through this pin. Reverse DC output current rating -3 A. |
| 2 | INPUT1 | bidirectional | Control / diagnostic pin for channel 1. Drives the internal gate control block (VINTH 0.5-2.5 V, IIN limited to ±20 mA, RIN min 330 Ω required externally, ISS ~100 µA at VIN=5 V). Also acts as fault feedback: when overtemperature / short circuit occurs the pin is pulled to a fault sink current (Igf ≈ 10-20 mA) which can be monitored. |
| 3 | SOURCE2 | power_out | Source of channel 2 power MOSFET. Independent from SOURCE1. Reverse DC output current rating -3 A. |
| 4 | INPUT2 | bidirectional | Control / diagnostic pin for channel 2. Same behavior as INPUT1: drives the gate control, requires ≥330 Ω series impedance, VINTH 0.5-2.5 V, and reports faults by sinking Igf ≈ 10-20 mA when protection trips. |
| 5 | DRAIN2 | power_in | Drain of channel 2 power MOSFET (paralleled with pin 6 for current handling and thermal). Connected to the supply / high-side node. Drain-source clamp voltage 40 V (typ 45 V). |
| 6 | DRAIN2 | power_in | Drain of channel 2 power MOSFET (paralleled internally with pin 5). Provides additional current and heat-sinking capability; tie both pins together on the PCB. |
| 7 | DRAIN1 | power_in | Drain of channel 1 power MOSFET (paralleled with pin 8). Connected to the supply / high-side node. Drain-source clamp voltage 40 V (typ 45 V). |
| 8 | DRAIN1 | power_in | Drain of channel 1 power MOSFET (paralleled internally with pin 7). Tie both pins together on the PCB for full current and thermal capability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
VNS1NV04DP-E (tube)VNS1NV04DPTR-E (tape and reel)
CAD (KiCad official)
- Symbol:
VNS1NV04DPTR-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
vns1nv04dptr-e-etched.step/vns1nv04dptr-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);vns1nv04dptr-e.step/vns1nv04dptr-e.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
vns1nv04dptr-e.step |
122 KB | You want the bare part, or you mark your own boards. |
vns1nv04dptr-e-etched.step |
2.1 MB | You want the part with VNS1NV04DPTR-E already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 557 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (24 pp, sha256
f7d7cba484b36f86, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).