VNL5050S5TR-E

@@ -0,0 +1,50 @@+# VNL5050S5TR-E++**STMicroelectronics** · AC-DC Controllers and Regulators · SO-8++VNL5050S5TR-E from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SUPPLY VOLTAGE | power_in | Supply voltage for the signal (logic) part, typically 5 V. Feeds the internal SUPPLY/LOGIC block. |+| 2 | INPUT | input | Voltage-controlled input pin with hysteresis, CMOS compatible. Controls the output switch (power MOS) state. DC input current rating -1 to 10 mA. Recommended pull-down to GND through a 10 kΩ resistor if left unused. |+| 3 | STATUS | output | Open-drain digital diagnostic pin (VNL5050S5-E only). Signals fault conditions such as overtemperature or open-load. May be left floating if unused; must NOT be tied to ground. DC status current rating -1 to 10 mA. |+| 4 | NC | unconnected | No internal connection. May be left floating or tied to ground. |+| 5 | DRAIN | passive | Power MOSFET drain. Connects to the load (low-side switch - the other side of the load ties to the battery). Internally clamped VDS (VCLAMP = 41 V), ID up to 19 A. Pins 5 and 8 are internally tied together. |+| 6 | SOURCE | power_in | Power MOSFET source and ground reference for the control section. Pins 6 and 7 are internally tied together and used as the device ground. |+| 7 | SOURCE | power_in | Power MOSFET source and ground reference for the control section. Pins 6 and 7 are internally tied together and used as the device ground. |+| 8 | DRAIN | passive | Power MOSFET drain. Connects to the load (low-side switch). Pins 5 and 8 are internally tied together; recommended to connect all DRAIN pins to a copper pour for thermal dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-8 |+| Category | PMIC |+| Pins | 8 |++## Ordering variants++- `VNL5050S5TR-EVNL5050S5-E`+- `VNL5050S5TR-E`+- `VNL5050S5TR-EVNL5050N3-E`+- `VNL5050S5TR-EVNL5050N3TR-E`++## CAD (KiCad official)++- Symbol: `VNL5050S5TR-E`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SO-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](docs/vnl5050s5tr-e-datasheet.pdf) (33 pp, sha256 `44edd20a5e513e96`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/vnl5050s5tr-e-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "vnl5050s5tr-e",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics AC-DC Controllers and Regulators, SO-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "vnl5050s5tr-e"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "vnl5050s5tr-e.kicad_sym",+    "vnl5050s5tr-e.kicad_mod",+    "vnl5050s5tr-e.glb",+    "vnl5050s5tr-e.step",+    "vnl5050s5tr-e.lbr",+    "docs/hero.png",+    "docs/vnl5050s5tr-e-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file