component
VNL5050S5TR-E
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers and Regulators, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C2149847). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+26−6
page.json+4−2@@ -26,7 +26,9 @@ "model_3d_step": "vnl5050s5tr-e.step", "lbr": "vnl5050s5tr-e.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C2149847"+ }, "pins": [ { "number": "1",@@ -38,7 +40,7 @@ "number": "2", "name": "INPUT", "type": "input",- "description": "Voltage-controlled input pin with hysteresis, CMOS compatible. Controls the output switch (power MOS) state. DC input current rating -1 to 10 mA. Recommended pull-down to GND through a 10 kΩ resistor if left unused."+ "description": "Voltage-controlled input pin with hysteresis, CMOS compatible. Controls the output switch (power MOS) state. DC input current rating -1 to 10 mA. Recommended pull-down to GND through a 10 k\u03a9 resistor if left unused." }, { "number": "3",
vnl5050s5tr-e.lbr+22−4@@ -62,6 +62,18 @@ <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.6000" y="2.4700"/>+ <vertex x="-2.8400" y="2.8000"/>+ <vertex x="-2.3600" y="2.8000"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.9750" y="2.4500"/>+ <vertex x="1.9500" y="2.4500"/>+ <vertex x="1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="1.4750"/>+ </polygon> <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@ <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/> <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="VNL5050S5TR-E">@@ -80,7 +92,7 @@ <wire x1="-12.7" y1="-7.62" x2="-12.7" y2="5.08" width="0.254" layer="94"/> <text x="0" y="7.62" size="1.27" layer="95" align="bottom-center">>NAME</text> <text x="0" y="-10.16" size="1.27" layer="96" align="top-center">>VALUE</text>- <pin name="SUPPLY VOLTAGE" x="-17.78" y="2.54" length="middle" direction="pwr"/>+ <pin name="SUPPLY_VOLTAGE" x="-17.78" y="2.54" length="middle" direction="pwr"/> <pin name="INPUT" x="-17.78" y="0" length="middle" direction="in"/> <pin name="STATUS" x="-17.78" y="-2.54" length="middle" direction="out"/> <pin name="NC" x="-17.78" y="-5.08" length="middle" direction="io"/>@@ -99,7 +111,7 @@ <devices> <device name="" package="VNL5050S5TR-E"> <connects>- <connect gate="G$1" pin="SUPPLY VOLTAGE" pad="1"/>+ <connect gate="G$1" pin="SUPPLY_VOLTAGE" pad="1"/> <connect gate="G$1" pin="INPUT" pad="2"/> <connect gate="G$1" pin="STATUS" pad="3"/> <connect gate="G$1" pin="NC" pad="4"/>@@ -108,7 +120,13 @@ <connect gate="G$1" pin="SOURCE@2" pad="6"/> <connect gate="G$1" pin="DRAIN@2" pad="5"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="VNL5050S5TR-E" constant="no"/>+ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+ <attribute name="LCSC_PN" value="C2149847" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>