component

VND10N06TR-E

Public Made by Adom

by adom

STMicroelectronics Power Distribution Switches, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)vnd10n06tr-efactory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs vnd10n06tr-e: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
viewers vnd10n06tr-e: viewers · Ray 1mo ago
package.json vnd10n06tr-e: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
page.json vnd10n06tr-e: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
README.md Initial commit: component/vnd10n06tr-e · Ray 1mo ago
vnd10n06tr-e-etched.fit.json vnd10n06tr-e: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
vnd10n06tr-e-etched.glb vnd10n06tr-e: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
vnd10n06tr-e-etched.step vnd10n06tr-e: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
vnd10n06tr-e.glb Publish 0.1.0 · Ray 1mo ago
vnd10n06tr-e.kicad_mod Publish 0.1.0 · Ray 1mo ago
vnd10n06tr-e.kicad_sym Publish 0.1.0 · Ray 1mo ago
vnd10n06tr-e.lbr Publish 0.1.0 · Ray 1mo ago
vnd10n06tr-e.step Publish 0.1.0 · Ray 1mo ago

VND10N06TR-E

STMicroelectronics · Power Distribution Switches · DPAK

VND10N06TR-E from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Input input Logic level gate input with internal Schmitt trigger; input threshold voltages VIL = 1.5V minimum and VIH = 3.2V maximum; supply current IISS = 150-300 µA at VDS = 0V and VIN = 5V.
2 Drain output Power MOSFET drain terminal with drain-source voltage internally clamped to 60V nominal (range 50-70V), drain current internally limited to 10A nominal (range 6-15A), and on-resistance RDS(on) = 0.3Ω maximum at VIN = 7V, ID = 1A, Tj < 125°C.
3 Source power_in Power MOSFET source terminal serving as the current return path and common reference point for input and output voltage measurements and internal protection circuits.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: VND10N06TR-E
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: vnd10n06tr-e-etched.step / vnd10n06tr-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vnd10n06tr-e.step / vnd10n06tr-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (25 pp, sha256 3c9fa02c73e7b512, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF