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vn750pttr-e: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)

Ray ·242626cd70 ·1mo ago ·parent 43b2411
2 files changed +87−7
package.json+45−5
@@ -53,13 +53,13 @@         "number": "1",         "name": "OUTPUT",         "type": "output",-        "description": "High-side switch output to the load, internally current-limited (Ilim 6 A to 15 A, VCC and temperature dependent), with on-state resistance RON=60 m\u03a9 typ at IOUT=2 A/Tj=25\u00b0C, reverse DC output current rated up to 6 A, and on-state/off-state open-load plus shorted-to-VCC detection reported on the STATUS pin."+        "description": "High-side switch output to the load, internally current-limited (Ilim 6 A to 15 A, VCC and temperature dependent), with on-state resistance RON=60 mΩ typ at IOUT=2 A/Tj=25°C, reverse DC output current rated up to 6 A, and on-state/off-state open-load plus shorted-to-VCC detection reported on the STATUS pin."       },       {         "number": "2",         "name": "STATUS",         "type": "output",-        "description": "Open-drain diagnostic status output requiring an external pull-up, with low output voltage VSTAT=0.5 V max at ISTAT=1.6 mA, clamp voltage 6 V to 8 V at ISTAT=1 mA, leakage current 10 \u00b5A max at VSTAT=5 V, and DC status current rated \u00b110 mA absolute maximum, used to signal overload, thermal shutdown, undervoltage/overvoltage, and open-load conditions."+        "description": "Open-drain diagnostic status output requiring an external pull-up, with low output voltage VSTAT=0.5 V max at ISTAT=1.6 mA, clamp voltage 6 V to 8 V at ISTAT=1 mA, leakage current 10 µA max at VSTAT=5 V, and DC status current rated ±10 mA absolute maximum, used to signal overload, thermal shutdown, undervoltage/overvoltage, and open-load conditions."       },       {         "number": "3",@@ -71,7 +71,7 @@         "number": "4",         "name": "INPUT",         "type": "input",-        "description": "CMOS-compatible logic input controlling the output switch, with input low level VIL=1.25 V max, input high level VIH=3.25 V min, input clamp voltage 6 V to 8 V, and DC input current rated \u00b110 mA absolute maximum."+        "description": "CMOS-compatible logic input controlling the output switch, with input low level VIL=1.25 V max, input high level VIH=3.25 V min, input clamp voltage 6 V to 8 V, and DC input current rated ±10 mA absolute maximum."       },       {         "number": "5",@@ -121,6 +121,46 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"-    }+    },+    "models_3d": [+      {+        "file": "vn750pttr-e.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9.9,+          6.5,+          2.32+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "15de31a63a2171bb645751e5fc084565bc3209818acba65544b612cee610249a",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "vn750pttr-e-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9.9,+          6.5,+          2.32+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "897083e2ab9cf2adbc226e7bbd6b2e8a3f55f431112ea1dd6f9dc34bfb2508e2",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]   }-}\ No newline at end of file+}
page.json+42−2
@@ -106,7 +106,47 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"-    }+    },+    "models_3d": [+      {+        "file": "vn750pttr-e.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9.9,+          6.5,+          2.32+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "15de31a63a2171bb645751e5fc084565bc3209818acba65544b612cee610249a",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "vn750pttr-e-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          9.9,+          6.5,+          2.32+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "897083e2ab9cf2adbc226e7bbd6b2e8a3f55f431112ea1dd6f9dc34bfb2508e2",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]   },   "metadata": {     "specs": {@@ -154,4 +194,4 @@     "public": true   },   "updated_at": "2026-09-25T13:56:01.932Z"-}\ No newline at end of file+}