component

VIPER319XDTR

Public Made by Adom

by adom

ST DC-DC Converters, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsviper319xdtrfactory-2.0.0extractor-text

Verified VIPER319XDTR

by Ray · last 7 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

7 Nov 2026RayPublished by the parts factory: tier mfr, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: VIPER319XDTR · SO-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 40-page datasheet
  • ✓distributor: lcsc C3093935, digikey 497-VIPER319XDTR-ND, mouser 511-VIPER319XDTR
  • ✓family: SOIC-16_3.9x9.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ddqf__az/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: body within the datasheet's package drawing (datasheet p.33)
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ viper319xdtr.kicad_sym✓ viper319xdtr.kicad_mod✓ viper319xdtr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5h ago
viewers viper319xdtr: viewers · Ray 5h ago
package.json Publish 0.1.0 · Ray 5h ago
page.json Set visibility: public · Ray 5h ago
README.md Publish 0.1.0 · Ray 5h ago
verification.json Verified: Published by the parts factory: tier mfr, 16 pins · Ray 5h ago
viper319xdtr-etched.glb Publish 0.1.0 · Ray 5h ago
viper319xdtr-etched.step viper319xdtr: factory component page (tier=mfr) · Ray 5h ago
viper319xdtr-hero.glb viper319xdtr: hero GLB from the etched model (keeps the MPN mark) · Ray 5h ago
viper319xdtr-hero.overlay.json Publish 0.1.0 · Ray 5h ago
viper319xdtr.glb Publish 0.1.0 · Ray 5h ago
viper319xdtr.kicad_mod Publish 0.1.0 · Ray 5h ago
viper319xdtr.kicad_sym Publish 0.1.0 · Ray 5h ago
viper319xdtr.lbr Publish 0.1.0 · Ray 5h ago
viper319xdtr.step Publish 0.1.0 · Ray 5h ago

VIPER319XDTR

ST · DC-DC Converters · SO-16

VIPER319XDTR from ST, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground and source of the internal MOSFET and return of the device bias current; all bias component grounds must tie to a trace to this pin, separate from the pulsed current return.
2 N.C. unconnected Not connected; can be soldered to GND on the PCB.
3 VCC power_in Controller supply (4.5 V to 30 V) needing an external storage capacitor to GND, and internally connected to the HV current source that charges it at startup; a 0.1 µF typ. bypass capacitor is recommended.
4 N.A. unconnected Not available for user; mechanically connected to the controller die pad, and connecting it to GND is highly recommended to improve noise immunity.
5 UVP input Undervoltage protection input that disables the IC if below 0.4 V typ. for more than 30 ms typ., and is left open if the feature is not used.
6 OVP input Overvoltage protection input that stops PWM in auto-restart if above 4 V typ. for more than 250 µs typ., and is connected to GND if not used.
7 FB input Direct feedback input, the inverting input of the internal transconductance E/A referenced to 1.2 V, and the E/A is disabled if FB is tied to GND.
8 COMP bidirectional Output of the internal E/A where the compensation network to GND is connected, or driven directly by the optocoupler in secondary feedback to set the DRAIN peak current.
9 N.C. unconnected Not connected; must be left floating to keep a safe clearance distance.
10 N.C. unconnected Not connected; must be left floating to keep a safe clearance distance.
11 N.C. unconnected Not connected; must be left floating to keep a safe clearance distance.
12 N.C. unconnected Not connected; must be left floating to keep a safe clearance distance.
13 DRAIN passive 800 V MOSFET drain, also the source of the HV startup current for the VCC capacitor, and connected to the internal metal pad for heat dissipation.
14 DRAIN passive 800 V MOSFET drain, also the source of the HV startup current for the VCC capacitor, and connected to the internal metal pad for heat dissipation.
15 DRAIN passive 800 V MOSFET drain, also the source of the HV startup current for the VCC capacitor, and connected to the internal metal pad for heat dissipation.
16 DRAIN passive 800 V MOSFET drain, also the source of the HV startup current for the VCC capacitor, and connected to the internal metal pad for heat dissipation.

Key specifications

Parameter Value
Manufacturer ST
Package SO-16
Category Power Management ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC operating voltage range VCC 4.5 30 V 6
VCC voltage VCC -0.3 30.5 V 4
FB voltage VFB -0.3 5 V 4
Power dissipation PTOT 1 W Tamb < 50°C 4
Junction temperature operating range TJ -40 150 °C 4
Storage temperature TSTG -55 150 °C 4
Thermal resistance junction to case, SO16N RTH-JC 10 °C/W dissipated power = 1W; standard single side FR4 board with minimum copper area 4
Thermal resistance junction to ambient, SO16N RTH-JA 120 °C/W dissipated power = 1W; standard single side FR4 board with minimum copper area 4
Thermal resistance junction to case, SO16N RTH-JC 5 °C/W dissipated power = 1W; standard single side FR4 board with 100mm² (0.155² inch) of Cu (35 μm thick) 4
Thermal resistance junction to ambient, SO16N RTH-JA 85 °C/W dissipated power = 1W; standard single side FR4 board with 100mm² (0.155² inch) of Cu (35 μm thick) 4
Static drain-source ON-resistance RDS(on) 3.5 Ω IDRAIN = 400 mA, TJ = 25°C 5
Static drain-source ON-resistance RDS(on) 7 Ω IDRAIN = 400 mA, TJ = 125°C 5
Breakdown voltage VBVDSS 800 V IDRAIN = 1 mA, VCOMP = VGND, TJ = 25°C 5
VCC charging current at startup ICH1 0.5 1 1.5 mA VDRAIN = 100V, VCC ≤ 1V 6
VCC charging current ICH2 7.6 8.8 10 mA VFB > VFB_REF, VDRAIN = 100V, 1V < VCC <VCCon 6
Startup resistor RG 36 45 54 MΩ VFB > VFB_REF, VDRAIN = 400 V, VDRAIN = 600 V 6
VCC startup threshold VCcon 7.5 8 8.5 V 6
HV current source turn-on threshold VCson 4 4.25 4.5 V VCC falling 6
UVLO VCcoff 3.75 4 4.25 V 6
Operating supply current, switching ICC 1.25 1.7 mA VDS = 150 V, VCOMP = 1.2 V, FOSC = 30 kHz 6
E/A disable voltage VFB_DIS 150 180 210 mV 7
Reference voltage VFB_REF 1.175 1.2 1.225 V 7
Pull-up current IFB_PULL 0.9 1 1.1 µA 7
Trans conductance GM 400 550 700 µA/V VCOMP=1.5 V, VFB >VFBREF 7
Max. source current ICOMP1 75 100 125 µA VCOMP=1.5 V, VFB =0.5 V 7
Max. sink current ICOMP2 75 100 125 µA VFB=2 V, VCOMP=1.5 V 7
Dynamic resistance RCOMP(DYN) 13 15 17 kΩ VCOMP=2.7 V, VFB =GND 7
Current limitation threshold VCOMPH 2.75 3.1 3.45 V 7
PFM threshold VCOMPL 0.6 0.8 1 V 7
ΔVCOMP/ΔIDRAIN, VIPER319* HCOMP 2.9 3.2 3.5 V/A VIPER319* 7
Drain current limitation, VIPER319* IDLIM 940 990 1040 mA TJ= 25°C 7
Drain current limitation, VIPER319* over temperature IDLIM 891 990 1089 mA 7
Power coefficient tolerance IDLIM_TYP2 x FOSC_TYP -10 10 % VIPER319X 7
Power coefficient, VIPER319X I2f 29.4 A2·kHz IDLIM_TYP2 x FOSC_TYP, VIPER319X 7
Drain current limitation at light load, VIPER319* IDlim_PFM 120 150 180 mA TJ=25°C, VCOMP=VCOMPL 7
Overload delay time tOVL 45 50 55 ms 8
Max. overload delay time tOVL_max 100 ms When in pulse skipping 8
Soft-start time tSS 5 8 11 ms 8
Minimum turn-on time tON_MIN 250 300 350 ns VCC=9 V, VCOMP=1 V, VFB=VFB_REF 8
Restart time after fault tRESTART 0.625 1 1.375 s 8
UVP threshold VUVP_th 0.38 0.4 0.42 V VCC =9 V, VCOMP=1 V, VFB=VFB_REF 8
Debounce time before UVP tripping tUVP_DEB 18.75 30 41.25 ms 8
Debounce time for restoring normal operation from UVP tUVP_REST 18.75 30 41.25 ms 8
Quiescent current during UVP Iq_DIS 0.25 0.35 mA Not switching, VFB>VFB_REF 8
Overvoltage protection threshold VOVP_th 3.85 4 4.15 V VCC=9 V, VCOMP=1 V, VFB=VFB_REF 8
Debounce time before OVP tripping tOVP_DEB 156 250 344 µs 8
Restart time after overvoltage protection tripping tOVP_REST 312 500 688 ms 8
Switching frequency, VIPER31*X FOSC 27 30 33 kHz TJ =25ºC 8
Min. switching frequency FOSC MIN 13.5 15 16.5 kHz TJ= 25ºC (see note 3) 8
Modulation depth FD -7 7 % ±7·FOSC 8
Max. duty cycle DMAX 70 80 % 8
Thermal shutdown temperature threshold TSD 150 160 °C 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper the VCC capacitor at startup. The pins are mechanically connected to the internal metal PAD of the MOSFET to help heat dissipation. On the PCB, some copper areas under these pins 3

CAD (KiCad official)

  • Symbol: VIPER319XDTR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: viper319xdtr-etched.step / viper319xdtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); viper319xdtr.step / viper319xdtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ST datasheet (40 pp, sha256 200c56a12395fdf1, retrieved 2026-11-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF