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VIPER318LDTR
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STMicroelectronics AC-DC Controllers And Regulators, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownVIPER318LDTR
STMicroelectronics · AC-DC Controllers And Regulators · SO-16
VIPER318LDTR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and MOSFET source, carrying both the internal MOSFET source and the bias current return; all bias component grounds must tie to a trace to this pin, kept separate from the pulsed current return. |
| 2 | N.C. | unconnected | Not connected; when designing the PCB this pin can be soldered to GND. |
| 3 | VCC | power_in | Controller supply with an external storage capacitor across VCC and GND; the pin is internally tied to the high-voltage current source that charges VCC at startup, and a 0.1 µF bypass capacitor placed close to the IC is recommended. |
| 4 | N.A. | passive | Not available for user; mechanically connected to the controller die pad, and it is highly recommended to connect it to GND to improve noise immunity. |
| 5 | UVP | input | Undervoltage protection input: the IC is disabled when VUVP stays below VUVP_th (0.4 V typ.) for more than tUVP_DEB (30 ms typ.), and it resumes after tUVP_REST (30 ms typ.) once VUVP rises above the threshold; leave open if the function is not required. |
| 6 | OVP | input | Overvoltage protection input: when VOVP exceeds VOVP_th (4 V typ.) for more than tOVP_DEB (250 µs typ.) the PWM is disabled in auto-restart for tOVP_REST (500 ms typ.); connect to GND if the function is not required. |
| 7 | FB | input | Direct feedback, the inverting input of the internal transconductance E/A referenced to 1.2 V with respect to GND; the E/A is disabled if FB is connected to GND. |
| 8 | COMP | output | Output of the internal E/A that requires a compensation network to GND for loop stability; in secondary feedback the COMP pin is driven directly by the optocoupler to set the DRAIN peak current setpoint. |
| 9 | N.C. | unconnected | Not connected; must be left floating to maintain a safe clearance distance. |
| 10 | N.C. | unconnected | Not connected; must be left floating to maintain a safe clearance distance. |
| 11 | N.C. | unconnected | Not connected; must be left floating to maintain a safe clearance distance. |
| 12 | N.C. | unconnected | Not connected; must be left floating to maintain a safe clearance distance. |
| 13 | DRAIN | passive | MOSFET drain, from which the internal high-voltage current source charges the VCC capacitor at startup; these pins are tied to the internal metal pad for heat dissipation and PCB copper under them lowers junction-to-ambient thermal resistance. |
| 14 | DRAIN | passive | MOSFET drain, from which the internal high-voltage current source charges the VCC capacitor at startup; these pins are tied to the internal metal pad for heat dissipation and PCB copper under them lowers junction-to-ambient thermal resistance. |
| 15 | DRAIN | passive | MOSFET drain, from which the internal high-voltage current source charges the VCC capacitor at startup; these pins are tied to the internal metal pad for heat dissipation and PCB copper under them lowers junction-to-ambient thermal resistance. |
| 16 | DRAIN | passive | MOSFET drain, from which the internal high-voltage current source charges the VCC capacitor at startup; these pins are tied to the internal metal pad for heat dissipation and PCB copper under them lowers junction-to-ambient thermal resistance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-source (ground) voltage | VDS | 800 | V | 4 | |||
| Pulsed drain current | IDRAIN | 3 | A | pulse-width limited by SOA | 4 | ||
| VCC voltage | VCC | -0.3 | 30.5 | V | 4 | ||
| FB voltage | VFB | -0.3 | 5 | V | AMR valid when VCC ≥ 5 V; otherwise VCC + 0.3 V | 4 | |
| Power dissipation | PTOT | 1 | W | Tamb < 50°C | 4 | ||
| Junction temperature operating range | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | TSTG | -55 | 150 | °C | 4 | ||
| Thermal resistance junction to case, SO16N | RTH-JC | 10 | °C/W | dissipated power = 1 W; FR4 board, minimum copper area | 4 | ||
| Thermal resistance junction to ambient, SO16N | RTH-JA | 120 | °C/W | dissipated power = 1 W; FR4 board, minimum copper area | 4 | ||
| Thermal resistance junction to case, SO16N | RTH-JC | 5 | °C/W | dissipated power = 1 W; FR4 board, 100 mm² (0.155² inch) Cu, 35 µm | 4 | ||
| Thermal resistance junction to ambient, SO16N | RTH-JA | 85 | °C/W | dissipated power = 1 W; FR4 board, 100 mm² (0.155² inch) Cu, 35 µm | 4 | ||
| Breakdown voltage | VBVDSS | 800 | V | IDRAIN = 1 mA, VCOMP = VGND, TJ = 25°C | 5 | ||
| Static drain-source ON-resistance | RDS(on) | 3.5 | Ω | IDRAIN = 400 mA, TJ = 25°C | 5 | ||
| Static drain-source ON-resistance | RDS(on) | 7 | Ω | IDRAIN = 400 mA, TJ = 125°C | 5 | ||
| VCC operating voltage range | VCC | 4.5 | 30 | V | 6 | ||
| VCC startup threshold | VCcon | 7.5 | 8 | 8.5 | V | 6 | |
| HV current source turn-on threshold | VCson | 4 | 4.25 | 4.5 | V | VCC falling | 6 |
| UVLO | VCcoff | 3.75 | 4 | 4.25 | V | 6 | |
| VCC charging current at startup | ICH1 | 0.5 | 1 | 1.5 | mA | VDRAIN = 100 V, VCC ≤ 1 V | 6 |
| VCC charging current | ICH2 | 7.6 | 8.8 | 10 | mA | VFB > VFB_REF, VDRAIN = 100 V, 1 V < VCC < VCCon | 6 |
| Startup resistor | RG | 36 | 45 | 54 | MΩ | VFB > VFB_REF, VDRAIN = 400 V, VDRAIN = 600 V | 6 |
| Operating supply current, switching | ICC | 1.5 | 2 | mA | VDS = 150 V, VCOMP = 1.2 V, FOSC = 60 kHz | 6 | |
| Reference voltage | VFB_REF | 1.175 | 1.2 | 1.225 | V | 7 | |
| E/A disable voltage | VFB_DIS | 150 | 180 | 210 | mV | 7 | |
| Pull-up current | IFB_PULL UP | 0.9 | 1 | 1.1 | µA | 7 | |
| Trans conductance | GM | 400 | 550 | 700 | µA/V | VCOMP = 1.5 V, VFB > VFBREF | 7 |
| Max. source current | ICOMP1 | 75 | 100 | 125 | µA | VCOMP = 1.5 V, VFB = 0.5 V | 7 |
| Max. sink current | ICOMP2 | 75 | 100 | 125 | µA | VFB = 2 V, VCOMP = 1.5 V | 7 |
| Dynamic resistance | RCOMP(DYN) | 13 | 15 | 17 | kΩ | VCOMP = 2.7 V, VFB = GND | 7 |
| Current limitation threshold | VCOMPH | 2.75 | 3.1 | 3.45 | V | 7 | |
| PFM threshold | VCOMPL | 0.6 | 0.8 | 1 | V | 7 | |
| ΔVCOMP/ΔIDRAIN, VIPER318 | HCOMP | 3.2 | 3.5 | 3.8 | V/A | 7 | |
| Drain current limitation, VIPER318 | IDLIM | 810 | 850 | 890 | mA | TJ = 25°C | 7 |
| Drain current limitation, VIPER318 | IDLIM | 765 | 850 | 935 | mA | Note (1): measured at Vin = 100 Vdc, flyback, 1.5 mH primary inductance | 7 |
| Power coefficient IDLIM_TYP2 x FOSC_TYP, VIPER318L tolerance | I2f | -10 | 10 | % | VIPER318L; nominal 43.4 A2·kHz | 7 | |
| Drain current limitation at light load, VIPER318 | IDlim_PFM | 100 | 130 | 160 | mA | TJ = 25°C, VCOMP = VCOMPL; Note (1): measured at Vin = 100 Vdc, flyback, 1.5 mH primary inductance | 7 |
| Overload delay time | tOVL | 45 | 50 | 55 | ms | 8 | |
| Max. overload delay time | tOVL_max | 100 | ms | when in pulse skipping | 8 | ||
| Soft-start time | tSS | 5 | 8 | 11 | ms | 8 | |
| Minimum turn-on time | tON_MIN | 250 | 300 | 350 | ns | VCC = 9 V, VCOMP = 1 V, VFB = VFB_REF | 8 |
| Restart time after fault | tRESTART | 0.625 | 1 | 1.375 | s | 8 | |
| UVP threshold | VUVP_th | 0.38 | 0.4 | 0.42 | V | VCC = 9 V, VCOMP = 1 V, VFB = VFB_REF | 8 |
| Debounce time before UVP tripping | tUVP_DEB | 18.75 | 30 | 41.25 | ms | 8 | |
| Debounce time for restoring normal operation from UVP | tUVP_REST | 18.75 | 30 | 41.25 | ms | 8 | |
| Quiescent current during UVP | Iq_DIS | 0.25 | 0.35 | mA | Not switching, VFB > VFB_REF | 8 | |
| Overvoltage protection threshold | VOVP_th | 3.85 | 4 | 4.15 | V | VCC = 9 V, VCOMP = 1 V, VFB = VFB_REF | 8 |
| Debounce time before OVP tripping | tOVP_DEB | 156 | 250 | 344 | µs | 8 | |
| Restart time after overvoltage protection tripping | tOVP_REST | 312 | 500 | 688 | ms | 8 | |
| Switching frequency, VIPER31*L | FOSC | 54 | 60 | 66 | kHz | TJ = 25°C | 8 |
| Min. switching frequency | FOSC MIN | 13.5 | 15 | 16.5 | kHz | TJ = 25°C | 8 |
| Modulation depth (±7·FOSC) | FD | -7 | 7 | % | as a multiple of FOSC; parameter assured by design and characterization | 8 | |
| Max. duty cycle | DMAX | 70 | 80 | % | parameter assured by design and characterization | 8 | |
| Thermal shutdown temperature threshold | TSD | 150 | 160 | °C | parameter assured by design and characterization | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | the VCC capacitor at startup. The pins are mechanically connected to the internal metal PAD of the MOSFET to help heat dissipation. On the PCB, some copper areas under these pins | 3 |
CAD (KiCad official)
- Symbol:
VIPER318LDTR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
viper318ldtr-etched.step/viper318ldtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);viper318ldtr.step/viper318ldtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (40 pp, sha256
200c56a12395fdf1, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).