component
VIPER26HD
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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VIPER26HD
STMicroelectronics · AC-DC Controllers And Regulators · SOIC-16
VIPER26HD from STMicroelectronics, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and MOSFET source, connecting the source of the internal MOSFET and the controller ground reference. |
| 2 | GND | power_in | Ground and MOSFET source, connecting the source of the internal MOSFET and the controller ground reference (duplicate GND pin on SO16N). |
| 3 | N.C. | unconnected | Not connected; this pin can be soldered to GND. |
| 4 | N.A. | unconnected | Not available for user; mechanically connected to the controller die pad of the frame, and highly recommended to be connected to GND (pins 1, 2) to improve noise immunity. |
| 5 | VDD | power_in | Controller supply with an external storage capacitor across VDD and GND, charged by the internal high-voltage current source at startup and during fault conditions; a 0.1 µF bypass capacitor placed close to the IC is recommended. |
| 6 | LIM | passive | Drain current limitation: an external resistor to GND lowers the drain current limit below the default IDlim, a capacitor to GND must be lower than 470 nF, and the pin can be left open to use the default limit. |
| 7 | FB | input | Direct feedback, the inverting input of the internal transconductance E/A referenced internally to 3.3 V with respect to GND; the E/A is disabled by soldering FB to GND. |
| 8 | COMP | passive | Compensation pin, the output of the internal E/A that requires an RC compensation network to GND, or is directly driven by the optocoupler to set the drain peak current in isolated secondary-side regulation. |
| 9 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 10 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 11 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 12 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 13 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
| 14 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
| 15 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
| 16 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
VIPER26HD - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
viper26hd-etched.step/viper26hd-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);viper26hd.step/viper26hd.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (34 pp, sha256
396324b4060be48c, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# VIPER26HD
**STMicroelectronics** · AC-DC Controllers And Regulators · SOIC-16
VIPER26HD from STMicroelectronics, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and MOSFET source, connecting the source of the internal MOSFET and the controller ground reference. |
| 2 | GND | power_in | Ground and MOSFET source, connecting the source of the internal MOSFET and the controller ground reference (duplicate GND pin on SO16N). |
| 3 | N.C. | unconnected | Not connected; this pin can be soldered to GND. |
| 4 | N.A. | unconnected | Not available for user; mechanically connected to the controller die pad of the frame, and highly recommended to be connected to GND (pins 1, 2) to improve noise immunity. |
| 5 | VDD | power_in | Controller supply with an external storage capacitor across VDD and GND, charged by the internal high-voltage current source at startup and during fault conditions; a 0.1 µF bypass capacitor placed close to the IC is recommended. |
| 6 | LIM | passive | Drain current limitation: an external resistor to GND lowers the drain current limit below the default IDlim, a capacitor to GND must be lower than 470 nF, and the pin can be left open to use the default limit. |
| 7 | FB | input | Direct feedback, the inverting input of the internal transconductance E/A referenced internally to 3.3 V with respect to GND; the E/A is disabled by soldering FB to GND. |
| 8 | COMP | passive | Compensation pin, the output of the internal E/A that requires an RC compensation network to GND, or is directly driven by the optocoupler to set the drain peak current in isolated secondary-side regulation. |
| 9 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 10 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 11 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 12 | N.C. | unconnected | Not internally connected; must be left floating to ensure a safe clearance distance. |
| 13 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
| 14 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
| 15 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
| 16 | DRAIN | passive | MOSFET drain, sinking the internal high-voltage current source to charge the VCC capacitor at startup; mechanically tied to the internal MOSFET metal pad, so the PCB copper under the DRAIN pins should be maximized for heat dissipation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `VIPER26HD`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `viper26hd-etched.step` / `viper26hd-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `viper26hd.step` / `viper26hd.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603175660508893184) (34 pp, sha256 `396324b4060be48c`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/viper26hd-datasheet.pdf)