component
VIPER265KDTR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| viper265kdtr-etched.step | 1d ago |
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| viper265kdtr-hero.overlay.json | 1d ago |
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VIPER265KDTR
STMicroelectronics · AC-DC Controllers And Regulators · SOP-16
VIPER265KDTR from STMicroelectronics, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground connected to the source of the internal power MOSFET and the controller ground reference. |
| 2 | N.C. | unconnected | Not internally connected; highly recommended to connect to GND (pin 1) or leave floating. |
| 3 | N.C. | unconnected | Not internally connected; highly recommended to connect to GND (pin 1) or leave floating. |
| 4 | N.A. | unconnected | Not available for user; mechanically connected to the controller die pad, and highly recommended to connect to GND (pin 1) to improve noise immunity. |
| 5 | VCC | power_in | Supply voltage of the control section; this pin provides the charging current of the external capacitor. |
| 6 | N.C. | unconnected | Not available for user; highly recommended to connect to GND (pin 1). |
| 7 | FB | input | Inverting input of the internal transconductance error amplifier; a single resistor to the converter output gives an output equal to the error amplifier reference voltage, and an external resistor divider is required for higher output voltages. |
| 8 | COMP | output | Output of the internal transconductance error amplifier; the compensation network goes between this pin and GND, with linear voltage range from VCOMPL to VCOMPH, and it can directly control the PWM with an optocoupler. |
| 9 | N.C. | unconnected | Not internally connected; can be connected to GND or left floating. |
| 10 | N.C. | unconnected | Not internally connected; can be connected to GND or left floating. |
| 11 | N.C. | unconnected | Not internally connected; can be connected to GND or left floating. |
| 12 | N.C. | unconnected | Not internally connected; can be connected to GND or left floating. |
| 13 | DRAIN | passive | High voltage drain pin from which the built-in high voltage switched start-up bias current is drawn; connected to the metal frame to help heat dissipation, so a PCB copper area is required. |
| 14 | DRAIN | passive | High voltage drain pin from which the built-in high voltage switched start-up bias current is drawn; connected to the metal frame to help heat dissipation, so a PCB copper area is required. |
| 15 | DRAIN | passive | High voltage drain pin from which the built-in high voltage switched start-up bias current is drawn; connected to the metal frame to help heat dissipation, so a PCB copper area is required. |
| 16 | DRAIN | passive | High voltage drain pin from which the built-in high voltage switched start-up bias current is drawn; connected to the metal frame to help heat dissipation, so a PCB copper area is required. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source start voltage | VSTART | 60 | V | Drain-source start voltage (max.) | 3 | ||
| Operating voltage range | VDD | 11.5 | 23.5 | V | Operating voltage range | 3 | |
| Drain-source ON state resistance | RDS(on) | 8.5 | Ω | max.@25C | 3 | ||
| Breakdown voltage | V(BR)DSS | 1050 | V | 3 | |||
| Drain current limitation (VIPer265K) | IDLIM | 500 | mA | VIPer265K | 3 | ||
| E/A input voltage | VREF_FB | 3.3 | V | 3 | |||
| Switching frequency | FOSC | 60 | KHz | 3 | |||
| Thermal shutdown temperature | TSD | 160 | °C | 3 | |||
| Thermal resistance junction ambient | RthJA | 80 | °C/W | Dissipated power = 1 W; standard single side FR4 board with 100 mm2 Cu (35 µm thick) | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | Note: A PCB copper area has to be provided under DRAIN pins to heat dissipation. | 2 |
CAD (KiCad official)
- Symbol:
VIPER265KDTR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
viper265kdtr-etched.step/viper265kdtr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);viper265kdtr.step/viper265kdtr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (7 pp, sha256
ebecb1033c720977, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).