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Initial commit: component/viper22astr-e

Ray ·b90a083c30 ·1mo ago
2 files changed +83
README.mdadded+49
@@ -0,0 +1,49 @@+# VIPER22ASTR-E++**STMicroelectronics** · AC-DC Controllers and Regulators · SO-8++VIPER22ASTR-E from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SOURCE | power_in | Power MOSFET source and circuit ground reference. Pin 1 and pin 2 are internally connected to the same SOURCE node and are the ground return for VDD and FB. |+| 2 | SOURCE | power_in | Power MOSFET source and circuit ground reference (second SOURCE pin, internally tied to pin 1). |+| 3 | FB | input | Feedback input for current-mode PWM regulation. Useful voltage range 0 V to 1 V; the pin is current-sensitive (typically driven by an optocoupler). Peak drain current is defined by IFB; shorting FB to SOURCE yields the peak current limit IDlim (typ 0.7 A). Absolute-max IFB = 3 mA; internal input impedance ~1.2 kΩ. |+| 4 | VDD | power_in | Supply for the internal control circuits. Operating range 9 V to 38 V; absolute max 50 V. VDDon start-up threshold typ 14.5 V (13-16 V), VDDoff undervoltage lockout typ 8 V (7-9 V), overvoltage shutdown VDDovp typ 42 V. During start-up VDD is charged from DRAIN through the internal HV current source; in normal operation it is fed by the auxiliary transformer winding. |+| 5 | DRAIN | power_in | Power MOSFET drain. Also used by the internal high-voltage current source during start-up to charge the external VDD capacitor. BVDSS = 730 V (min); absolute-max VDS(sw) = -0.3 … 730 V; rDS(on) typ 15 Ω. Pins 5, 6, 7, 8 are internally tied to the same DRAIN node and should all be connected together with a large copper area for thermal dissipation. |+| 6 | DRAIN | power_in | Power MOSFET drain (second DRAIN pin, internally tied to pin 5). |+| 7 | DRAIN | power_in | Power MOSFET drain (third DRAIN pin, internally tied to pin 5). |+| 8 | DRAIN | power_in | Power MOSFET drain (fourth DRAIN pin, internally tied to pin 5). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-8 |+| Category | PMIC |+| Pins | 8 |++## Ordering variants++- `VIPER22ASTR-E`+- `VIPER22ASTR-EVIPer22AS-E`+- `VIPER22ASTR-EVIPer22ADIP-E`++## CAD (KiCad official)++- Symbol: `VIPER22ASTR-E`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SO-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/viper22astr-e.pdf) (21 pp, sha256 `9d66a04887088780`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/viper22astr-e-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "viper22astr-e",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics AC-DC Controllers and Regulators, SO-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "viper22astr-e"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "viper22astr-e.kicad_sym",+    "viper22astr-e.kicad_mod",+    "viper22astr-e.glb",+    "viper22astr-e.step",+    "viper22astr-e.lbr",+    "docs/hero.png",+    "docs/viper22astr-e-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file