component
VIPER113LSTR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownVIPER113LSTR
STMicroelectronics · AC-DC Controllers And Regulators · SSOP-10
VIPER113LSTR from STMicroelectronics, in a SSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and MOSFET source, serving as the connection of the internal MOSFET source and the return of the device bias current; all bias component grounds must tie to a trace going to this pin, kept separate from the pulsed current return. |
| 2 | VCC | power_in | Controller supply pin with an external storage capacitor across VCC and GND, internally connected to the high-voltage current source that charges the VCC capacitor at startup; a 0.1 µF typ. bypass capacitor placed close to the IC is recommended, and the VCC internal Zener current is limited to 45 mA (pulsed) maximum. |
| 3 | DIS | input | Disable input where, if the voltage exceeds VDIS_th (1.2 V typ.) for more than tDEB (1 ms typ.), the PWM is disabled for tDIS_RESTART (500 ms typ.) in auto-restart mode; the absolute maximum voltage is -0.3 V to 5 V, and the pin must be tied to GND if the disable function is not used. |
| 4 | FB | input | Direct feedback pin, the inverting input of the internal transconductance E/A referenced to 1.2 V with respect to GND; the absolute maximum voltage is -0.3 V to 5 V, and tying FB to GND disables the E/A. |
| 5 | COMP | output | Output of the internal E/A that requires a compensation network to GND for loop stability, and that is driven directly by the optocoupler in secondary feedback where the internal E/A is disabled; the absolute maximum voltage is -0.3 V to 5 V. |
| 6 | DRAIN | passive | MOSFET drain, rated for 800 V drain-to-source (ground) and 2 A pulsed drain current, which also sinks the internal high-voltage current used to charge the VCC capacitor; it is mechanically connected to the internal metal pad and needs a copper area on the PCB for heat dissipation. |
| 7 | DRAIN | passive | MOSFET drain, rated for 800 V drain-to-source (ground) and 2 A pulsed drain current, which also sinks the internal high-voltage current used to charge the VCC capacitor; it is mechanically connected to the internal metal pad and needs a copper area on the PCB for heat dissipation. |
| 8 | DRAIN | passive | MOSFET drain, rated for 800 V drain-to-source (ground) and 2 A pulsed drain current, which also sinks the internal high-voltage current used to charge the VCC capacitor; it is mechanically connected to the internal metal pad and needs a copper area on the PCB for heat dissipation. |
| 9 | DRAIN | passive | MOSFET drain, rated for 800 V drain-to-source (ground) and 2 A pulsed drain current, which also sinks the internal high-voltage current used to charge the VCC capacitor; it is mechanically connected to the internal metal pad and needs a copper area on the PCB for heat dissipation. |
| 10 | DRAIN | passive | MOSFET drain, rated for 800 V drain-to-source (ground) and 2 A pulsed drain current, which also sinks the internal high-voltage current used to charge the VCC capacitor; it is mechanically connected to the internal metal pad and needs a copper area on the PCB for heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SSOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
CAD (KiCad official)
- Symbol:
VIPER113LSTR - Footprint:
Package_SO:SSOP-10_3.9x4.9mm_P1.00mm - 3D model: SSOP-10 (KiCad packages3D, STEP)
- 3D model files:
viper113lstr-etched.step/viper113lstr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);viper113lstr.step/viper113lstr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (37 pp, sha256
c43ec45622596607, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).