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VIPER06XS

Public Made by Adom

by adom

STMicroelectronics AC-DC Controllers And Regulators, SOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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README.md Initial commit: component/viper06xs · Ray 22h ago
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VIPER06XS

STMicroelectronics · AC-DC Controllers And Regulators · SOP-10

VIPER06XS from STMicroelectronics, in a SOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Connected to the source of the internal power MOSFET and the controller ground reference.
2 VDD power_in Supply voltage of the control section with an operating range of 11.5 V to 23.5 V, a 23.5 V clamp, and an input current limit of 20 mA; it also receives the charging current for the external VDD capacitor.
3 LIM input Sets the drain current limit: an external resistor to GND reduces the limit (default limit when left open or RLIM > 80 kΩ), and the absolute input voltage range is -0.3 V to 2.8 V.
4 FB input Inverting input of the internal transconductance error amplifier with a reference of 3.2 V to 3.4 V (VREF_FB), and an absolute input voltage range of -0.3 V to 4.8 V.
5 COMP passive Output of the internal transconductance error amplifier used for loop compensation to GND and for direct PWM control by an optocoupler, with a linear range from VCOMPL to VCOMPH and an absolute input voltage range of -0.3 V to 3.5 V.
6 DRAIN passive High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation.
7 DRAIN passive High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation.
8 DRAIN passive High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation.
9 DRAIN passive High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation.
10 DRAIN passive High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOP-10
Category Power Management (PMIC)
Pins 10

CAD (KiCad official)

  • Symbol: VIPER06XS
  • Footprint: Package_SO:SOIC-10_3.9x4.9mm_P1mm
  • 3D model: SOP-10, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: viper06xs-etched.step / viper06xs-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); viper06xs.step / viper06xs.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (28 pp, sha256 1f4b7d4d7eefd84f, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF