component
VIPER06XS
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+46@@ -0,0 +1,46 @@+# VIPER06XS++**STMicroelectronics** · AC-DC Controllers And Regulators · SOP-10++VIPER06XS from STMicroelectronics, in a SOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Connected to the source of the internal power MOSFET and the controller ground reference. |+| 2 | VDD | power_in | Supply voltage of the control section with an operating range of 11.5 V to 23.5 V, a 23.5 V clamp, and an input current limit of 20 mA; it also receives the charging current for the external VDD capacitor. |+| 3 | LIM | input | Sets the drain current limit: an external resistor to GND reduces the limit (default limit when left open or RLIM > 80 kΩ), and the absolute input voltage range is -0.3 V to 2.8 V. |+| 4 | FB | input | Inverting input of the internal transconductance error amplifier with a reference of 3.2 V to 3.4 V (VREF_FB), and an absolute input voltage range of -0.3 V to 4.8 V. |+| 5 | COMP | passive | Output of the internal transconductance error amplifier used for loop compensation to GND and for direct PWM control by an optocoupler, with a linear range from VCOMPL to VCOMPH and an absolute input voltage range of -0.3 V to 3.5 V. |+| 6 | DRAIN | passive | High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation. |+| 7 | DRAIN | passive | High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation. |+| 8 | DRAIN | passive | High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation. |+| 9 | DRAIN | passive | High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation. |+| 10 | DRAIN | passive | High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOP-10 |+| Category | Power Management (PMIC) |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `VIPER06XS`+- Footprint: `Package_SO:SOIC-10_3.9x4.9mm_P1mm`+- 3D model: SOP-10, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `viper06xs-etched.step` / `viper06xs-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `viper06xs.step` / `viper06xs.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603086150894968832) (28 pp, sha256 `1f4b7d4d7eefd84f`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/viper06xs-datasheet.pdf)
page.jsonadded+212@@ -0,0 +1,212 @@+{+ "slug": "viper06xs",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics AC-DC Controllers And Regulators, SOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "viper06xs",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "viper06xs.kicad_sym",+ "viper06xs.kicad_mod",+ "viper06xs.glb",+ "viper06xs.step",+ "viper06xs.lbr",+ "docs/hero.png",+ "docs/viper06xs-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "viper06xs-hero.glb",+ "viper06xs-hero.overlay.json"+ ],+ "component": {+ "mpn": "VIPER06XS",+ "manufacturer": "STMicroelectronics",+ "package": "SOP-10",+ "pin_count": 10,+ "category": "Power Management (PMIC)",+ "subcategory": "AC-DC Controllers And Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603086150894968832",+ "parts": {+ "symbol": "viper06xs.kicad_sym",+ "footprint": "viper06xs.kicad_mod",+ "model_3d": "viper06xs-hero.glb",+ "model_3d_plain": "viper06xs.glb",+ "model_3d_step": "viper06xs-etched.step",+ "model_3d_step_plain": "viper06xs.step",+ "lbr": "viper06xs.lbr"+ },+ "distributor_links": {+ "lcsc": "C2971008",+ "digikey": "497-14660-ND",+ "mouser": "511-VIPER06XS"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T01:03:49Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-14660-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-VIPER06XS",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Connected to the source of the internal power MOSFET and the controller ground reference."+ },+ {+ "number": "2",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage of the control section with an operating range of 11.5 V to 23.5 V, a 23.5 V clamp, and an input current limit of 20 mA; it also receives the charging current for the external VDD capacitor."+ },+ {+ "number": "3",+ "name": "LIM",+ "type": "input",+ "description": "Sets the drain current limit: an external resistor to GND reduces the limit (default limit when left open or RLIM > 80 kΩ), and the absolute input voltage range is -0.3 V to 2.8 V."+ },+ {+ "number": "4",+ "name": "FB",+ "type": "input",+ "description": "Inverting input of the internal transconductance error amplifier with a reference of 3.2 V to 3.4 V (VREF_FB), and an absolute input voltage range of -0.3 V to 4.8 V."+ },+ {+ "number": "5",+ "name": "COMP",+ "type": "passive",+ "description": "Output of the internal transconductance error amplifier used for loop compensation to GND and for direct PWM control by an optocoupler, with a linear range from VCOMPL to VCOMPH and an absolute input voltage range of -0.3 V to 3.5 V."+ },+ {+ "number": "6",+ "name": "DRAIN",+ "type": "passive",+ "description": "High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation."+ },+ {+ "number": "7",+ "name": "DRAIN",+ "type": "passive",+ "description": "High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation."+ },+ {+ "number": "8",+ "name": "DRAIN",+ "type": "passive",+ "description": "High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation."+ },+ {+ "number": "9",+ "name": "DRAIN",+ "type": "passive",+ "description": "High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation."+ },+ {+ "number": "10",+ "name": "DRAIN",+ "type": "passive",+ "description": "High-voltage drain of the internal power MOSFET rated 800 V, with a pulse drain current limit of 2.5 A; it also supplies the high-voltage startup bias current and is connected to the metal frame for heat dissipation."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: VIPER06XS is listed in the ordering table (Table 10, page 26) as SSO10 tube/tape, so the SSO10 pinou; The datasheet does not assign KiCad ERC pin types. Types were inferred from the function description; Table 2 lists DRAIN pins for SSO10 as 6-10 in a single row; each pin is listed individually with the"+ ],+ "pages_sent": 28,+ "cost_usd": 0.0733,+ "at": "2026-10-08T01:03:28"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603086150894968832",+ "pages": 28,+ "sha256": "1f4b7d4d7eefd84f",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 10,+ "described": 10,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "viper06xs.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.06,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b248dcf84c121a86050ca182898e41685d2e6f696b7baec3cb2ddb032ac4aaf9",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "viper06xs-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.06,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "980a6ce1c0d9e10fcc7634e53b9cbc775fc8e66e51e48ff8a73e09010fe7be28",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}